In PCB design, power supply is an indispensable topic, especially now that many products have increasingly lower power supply voltages and higher currents, often reaching hundreds of amperes. Therefore, people are paying more and more attention to power supply integrity. This article focuses on some issues related to power supply voltage drop.
Theoretically speaking, calculating voltage drop should apply knowledge from junior high school physics, specifically the concept of power supply voltage drop.
"Mr. XX, could you please replace these 8mil small holes with 16mil large holes?"
"Mr./Ms. XX, this power supply cannot be changed multiple times. Please adjust it."
"Mr. XX, replace this power layer with 2OZ copper foil."
Many confident engineers would probably think, "It's just current carrying capacity. I've calculated the number of vias and the width of the copper foil according to empirical formulas. The power supply is definitely fine and there can't be any problems. I'm past the age of being easily fooled."
In reality, is voltage drop simply a matter of the voltage at the power consumption terminal? No, power supply voltage drop is a complex system where a change in one part affects the entire system; modifying any parameter within the system will influence the final result. To understand this system, one must know the flow of power.
As shown in the diagram, the top is a power plane, and the marked paths represent the areas with the highest current density. The green area represents the shortest path from the power source to the return ground plane. It can be seen that the shorter the path, the more current flows. Just like people, current tends to take shortcuts, choosing paths with lower resistance to conserve power for the consumer.
This characteristic leads to higher current density in some areas and higher current passing through some vias. Therefore, simply adding a certain number of vias according to empirical formulas does not guarantee an even distribution of current. This results in some vias carrying current exceeding their capacity, potentially causing vias to break after a period of use, affecting their lifespan and the board's overall lifespan. Therefore, for high-current power supplies, neatly arranging vias may actually negatively impact the current through them. In such cases, there's a technique to adding vias; vias closer to the power output tend to have higher current. In these situations, simulation-guided via array addition is recommended.
The same applies to current density. The current density will be higher on the shortest path between the power supply output terminal and the power consumption terminal. If the shortest path happens to be a bottleneck area, the power supply path needs to be modified.
Another factor affecting the voltage drop of a power supply is temperature and airflow. Temperature primarily affects the resistivity of the conductor; as temperature increases, resistivity also increases, leading to a rise in the DC resistance of the conductor. Therefore, power supply designs for high power consumption also need to consider heat dissipation.
In summary, when designing a power supply, in addition to meeting the requirements for copper trace width and number of vias, we also need to pay attention to the current magnitude of each via, the current density along the power path, and factors such as the board's operating environment and temperature rise.
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