Foreword
With the rapid development of power electronics technology, typical nonlinear devices such as frequency converters, synchronous motor excitation equipment, and switching power supplies have been widely used. These devices inject a large amount of harmonic current into the public power grid during operation, leading to a series of problems such as ferroresonance, line losses, and deteriorated power quality. To address this issue, active power filter (APF) technology has rapidly developed.
APF technology is relatively mature to date. From a topology perspective, the mainstream topology is the three-phase full-bridge pulse width modulation (PWM) converter. The disadvantage of this topology is its low output voltage, making direct connection to high-voltage grids impossible. The method of connecting to high-voltage grids involves multiple APF devices connected in parallel and then connected to the medium-voltage grid via a step-up transformer, as shown in Figure 1. The drawbacks of this approach are obvious. Since the transformer is an inductive device with an iron core, firstly, the high-order compensation current generated by the APF is attenuated when passing through the transformer; the higher the order, the greater the attenuation, thus affecting the harmonic compensation effect. Secondly, these compensation currents cause significant heating of the iron core and even magnetic circuit saturation, jeopardizing the normal operation of the transformer.
Figure 1. Schematic diagram of APF equipment connected to the high-voltage power grid
From a control scheme perspective, it aims at current control, and related control strategies include hysteresis control, resonant control, and synchronous rotating coordinate system control. Hysteresis control is characterized by fast response, simple control structure, and good robustness. Its disadvantages include variable switching frequency, difficulty in designing hysteresis width, and limited applicability to high-power equipment. Resonant control can be understood as the generalized integral of a sine signal, possessing infinite gain at specific frequency points, theoretically resulting in zero steady-state tracking error at that frequency. However, in practical engineering applications, an ideal resonant controller can introduce stability issues, and when the actual resonant frequency deviates from the designed resonant frequency, the open-loop gain decreases significantly, affecting the compensation effect. Synchronous rotating coordinate system control utilizes a phase-locked loop to set multiple synchronous rotating coordinates, thereby converting a specified harmonic into a DC quantity in a rotating coordinate system. Zero steady-state error tracking can be achieved using low-bandwidth PI control parameters. However, its disadvantages are also prominent. For example, each harmonic that needs to be compensated requires a controller, which greatly increases the amount of computation. Its harmonic extraction uses a low-pass filter, and each harmonic actually contains a small number of other harmonics. When multiple controllers work at the same time, they will interfere with each other and easily cause system oscillation.
To enable the APF device to be directly connected to the high-voltage power grid, this design adopts an H-bridge cascade scheme, which can directly output high voltage. In terms of control, a PI control parallel repeat control (RE) strategy is adopted to improve steady-state control accuracy while meeting fast response requirements.
2. High-voltage APF topology diagram
APF Topology
The APF designed in this paper has an output voltage of 4160kV, and the power unit adopts an H-bridge structure. The inverter circuit adopts a cascaded H-bridge (CHB) configuration, with each converter chain consisting of 5 cascaded power units. The three converter chains are connected in a Y-shape, with the neutral point floating. Each link includes a pre-charge resistor and a contactor connected in parallel with it, and is connected to the high-voltage grid's point of common coupling (PCC) through a grid-connected reactor. The topology is shown in Figure 2.
Control System Design
The APF control system in this design mainly includes overall voltage control of the DC bus in the converter chain, DC bus voltage equalization control among power units within the DC bus, and compensation current control, as shown in Figure 3.
Figure 3. High-voltage APF control system diagram
DC bus voltage control of power unit
This paper uses a typical nonlinear load three-phase full-bridge rectifier for analysis. The current is shown by the blue curve in Figure 4. The black curve represents the ideal output current waveform of the APF, and the red curve represents the ideal waveform after compensation at the common coupling point. The waveform on the right represents the harmonic content of the load current. This can be understood as the power grid only providing the fundamental active current to this load, while the APF device provides other higher-order harmonic active currents.
Figure 4 Load current curve and harmonic content of three-phase full-bridge rectifier
Equation 1 below is the active power formula, where is the phase difference between the nth harmonic current and voltage. For a typical three-phase full-bridge load, there are only 6k±1 harmonics, and the active power can be simplified to Equation 2. Since the APF device only compensates for higher harmonics, the fundamental active power can be used to control the voltage value of the DC bus.
Formula 1
Formula 2
The significant difference between cascaded APF and low-voltage APF in the control system lies in the DC bus voltage equalization problem among the power units. Due to inconsistencies in switching device parameters and the impossibility of perfect synchronization of H-bridge drive pulses, there are significant differences in the DC bus voltages of each power unit. Power units with lower voltages will enter an overmodulation state, which will generate more harmonic currents. The DC bus voltage can be adjusted by using the current flowing through the capacitor of the power unit, as shown in Figure 5.
Figure 5 DC bus voltage control diagram
Current compensation strategy based on PI control and parallel repetitive control
Repetitive control technology originates from the internal model principle of control theory. It utilizes the periodic variation of load disturbances to selectively correct steady-state errors periodically, achieving high-precision control. It is simple in structure and easy to implement. Its continuous and discrete forms are shown in Equation 3 below. Its disadvantage is its slow response speed. To improve the dynamic response speed of the controller, a parallel PI controller is introduced, as shown in Equation 4 and Figure 6 below.
Formula 3
In the above formula, T is the period of the static error, and TS is the sampling period.
Formula 4
As shown in Figure 4, fine-tuning can be performed based on the period of the static error.
This is the periodic accumulation of periodic errors.
A value of 0.707 is chosen, where Wn is the crossover frequency, used to improve controller stability and suppress high-frequency disturbances.
Let L be the transfer function of the controlled system, and L be the connection reactor.
It is a differential form of PI controller.
Figure 6 APF Digital Composite Controller
Table 1 Simulation Model Parameter Settings
Simulation verification
To verify the algorithm presented in this paper, a simulation model was built in MATLAB, as shown in Figure 7. CHB is the inverter circuit, CT is the current sensor, and PT is the voltage sensor. The main circuit includes two sets of current sensors: one set detects the inverter's output current, and the other detects the current at the common coupling point (CCP) for harmonic compensation. It also includes one set of PTs to detect the CHB's output voltage. Additionally, the DC bus voltage of each power unit is detected for DC bus amplitude control and voltage equalization control. The load is a three-phase full-bridge rectifier, with a resistive load connected to its output. The performance indicators to be evaluated are the DC bus voltage control effect and the harmonic distortion of the CCP current.
Figure 7 Simulation model of unit-cascaded APF
As can be seen from Figures 8 and 9,
(1) 0~0.2s is the pre-charging process. In order to accelerate the simulation process, the initial voltage of the capacitor is set to 20% of the rated value.
(2) 0.2~0.8s is DC bus control and current compensation control, which shows that the control system responds quickly.
(3) The curves in the top1 figure represent the DC bus voltage of each unit in the A-phase converter chain. The control target is 1000V, and the deviation between the maximum and minimum voltage values of each unit does not exceed 5V.
Figure 8. APF DC bus control effect and current compensation curve
Figure 9. Enlarged view of APF DC bus control effect and current compensation curve
(4) The top2 figure shows a comparison waveform of the sum of the DC bus values of the three converter chains. The overall control target is 5000V, and all three phase voltages reach the rated value within 0.7s. The deviation between the maximum and minimum values does not exceed 150V.
(5) The bottom1 figure shows the common coupling point current, whose outline is close to a sine wave. However, the compensation effect is slightly weak when the load current changes transiently, and it does not fully compensate for high-frequency harmonics.
(6) The bottom2 figure shows the APF output current. By comparing the load harmonic waveform in Figure 4, it can be found that the two are very close.
Analysis of compensation effect
Table 2 shows the IEC 519-2014 specifications for harmonic content. It specifies the odd-order harmonic limits for 120V~69kV grid currents, where is the short-circuit current at the point of common coupling, is the load current, and even-order harmonics are 25% of the corresponding odd-order harmonics.
Figure 10 shows the FFT analysis of the current at the common coupling point of the system. Comparing with Table 2, it can be seen that the content of each harmonic and the overall harmonic content meet the requirements.
Table 2 Maximum Harmonic Current Limits in IEC 519-2014
Figure 10. FFT analysis of the common coupling point current.
in conclusion
The simulation results show that the high-voltage APF device designed in this paper has high DC bus control accuracy with virtually no fluctuations, which is beneficial for the design of DC bus overvoltage protection algorithms. The current response is rapid and the compensation effect is good, meeting the requirements of IEC519-2014 regarding the harmonic content of the common coupling point.
