During the input sampling phase, the programmable logic controller (PLC) sequentially reads all input states and data in a scanning manner and stores them in the corresponding cells of the I/O image area. After input sampling is completed, the process transitions to the user program execution and output refresh phases. During these two phases, even if the input states and data change, the states and data of the corresponding cells in the I/O image area will not change. Therefore, if the input is a pulse signal, the width of the pulse signal must be greater than one scan cycle to ensure that the input can be read under any circumstances.
During the user program execution phase, the programmable logic controller (PLC) always scans the user program (ladder diagram) sequentially from top to bottom. When scanning each ladder diagram, it always first scans the control circuit composed of each contact on the left side of the ladder diagram, and performs logical operations on the control circuit composed of contacts in the order of left to right and top to bottom. Then, based on the result of the logical operation, it refreshes the state of the corresponding bit in the system RAM storage area of the logic coil; or refreshes the state of the corresponding bit in the I/O image area of the output coil; or determines whether to execute the special function instruction specified by the ladder diagram.
That is, during the execution of the user program, only the state and data of the input points in the I/O image area will not change, while the state and data of other output points and soft devices in the I/O image area or system RAM storage area may change. Moreover, the program execution result of the ladder diagram above will affect the ladder diagram below that uses these coils or data; conversely, the state or data of the logic coils of the ladder diagram below can only affect the program above it in the next scan cycle.
During program execution, if immediate I/O instructions are used, I/O points can be accessed directly. Even when using I/O instructions, the value of the input process image register is not updated; the program directly retrieves values from the I/O module. The output process image register is updated immediately, which is somewhat different from immediate input.
After the user program scan is complete, the programmable logic controller (PLC) enters the output refresh phase. During this period, the CPU refreshes all output latch circuits according to the corresponding states and data in the I/O image area, and then drives the corresponding peripherals through the output circuits. This is when the PLC actually outputs.
① The PLC adopts a centralized sampling and centralized output working mode, which reduces the impact of external interference.
②The working process of a PLC is a cyclic scanning process. The length of the cyclic scanning time depends on factors such as the instruction execution speed and the length of the user program.
③ The output has a lag effect on the input. PLCs use a centralized sampling and centralized output mode. After the sampling phase ends, changes in the input state will not be received until the next sampling cycle. Therefore, the length of this lag time mainly depends on the length of the cycle. In addition, factors affecting the lag time include the input filtering time and the lag time of the output circuit.
④ The contents of the output image register depend on the results of the user program's scan execution.
⑤ The contents of the output latch are determined by the data in the output image register during the previous output refresh.
⑥ The current actual output state of the PLC is determined by the contents of the output latch.
