Some of the best circuits that will drive artificial intelligence in the future may be analog rather than digital, and research teams around the world are increasingly developing new devices to support this analog AI.
The most fundamental computation in the deep neural networks that drive the current explosive growth of AI is the multiplicative accumulation (MAC) operation. Deep neural networks consist of layers of artificial neurons. In the MAC operation, the output of each of these layers is multiplied by the strength, or "weight," of its connection to the next layer, and then these contributions are summed.
Modern computers have dedicated digital components for MAC operations, but in theory, analog circuitry can perform these calculations with several orders of magnitude less power. This strategy (known as analog artificial intelligence, in-memory computing, or memory processing) typically uses non-volatile storage devices such as flash memory, magnetoresistive RAM (MRAM), resistive RAM (RRAM), phase-shift memory (PCM), and more esoteric techniques to perform these multiply-accumulate operations.
However, a team in South Korea is exploring neural networks based on praseodymium calcium manganese oxide electrochemical RAM (ECRAM) devices, which act like miniature batteries, storing data in the form of changes in electrical conductance. Chuljun Lee, the lead author of the study from Pohang University of Science and Technology in South Korea, points out that neural network hardware typically has different requirements during training and application. For example, low energy barriers help neural networks learn quickly, but high energy barriers help them retain the learned knowledge for use in applications.
“Heating their equipment to near 100 degrees Celsius during training produces training-friendly properties,” says John Paul Strachan, an electrical engineer and head of the Peter Grünberg Institute for Neuromorphic Computational Nodes at the Jülich Research Centre in Germany, who was not involved in the study. “When it cools, they gain the advantage of longer retention times and lower operating current. With just a turn of a knob, the heat, they can see improvements in multiple dimensions of computation.”
The researchers detailed their findings at the annual IEEE International Electron Devices Meeting (IEDM) in San Francisco on December 14.
Strachan points out that a key issue this work faces is what kind of degradation ECRAM might experience after multiple heating and cooling cycles. Nevertheless, "it's a very creative idea, and their work demonstrates that this approach may have some potential."
Another group studied ferroelectric field-effect transistors (FEFETs). Lead author of the study, Khandker Akif Aabrar of the University of Notre Dame, explained that FEFETs store data in an electrically polarized manner within each transistor.
One challenge facing FEFETs is whether they can still display simulated behavior valuable for AI applications when they scale down, or whether they will suddenly switch to a binary mode that stores only one bit of information, polarizing the state to one state or another.
“The strength of this team’s work lies in their insight into the materials involved,” said Strachan, who was not involved in the study. “Ferroelectric materials can be thought of as blocks made up of many small domains, just as ferromagnets can be thought of as top and bottom domains. For the behavior they wanted to simulate, they wanted all these domains to slowly align up or down in response to the applied electric field, rather than exhibiting a runaway process where they all rise or fall simultaneously. Therefore, they physically decomposed the ferroelectric superlattice structure with multiple dielectric layers to reduce this runaway process.”
The system achieved an online learning accuracy of 94.1%, which is excellent compared to other FEFET and RRAM technologies. Scientists detailed this finding at the IEDM conference on December 14. Strachan noted that future research could seek to optimize properties such as those at the current level.
Japanese and Taiwanese scientists have created a new microchip using c-axis-aligned crystalline indium gallium zinc oxide. Research co-author Satoru Ohshita of Japan Semiconductor Energy Laboratory noted that their oxide semiconductor field-effect transistor (OSFET) exhibits ultra-low current operation of less than 1 nanoamp per cell and an operating efficiency of 143.9 trillion operations per watt per second. The results, detailed at the IEDM conference on December 14, represent the best performance reported to date for analog AI chips.
“These are extremely low-current devices,” Strachan said. “Because the required current is so low, you can make the circuit blocks much larger—they get arrays of 512 x 512 memory cells, while typical RRAM numbers are more like 100 x 100. That’s a huge win because larger blocks get a squared advantage in the weight they store.” When OSFETs are combined with capacitors, they can retain information with over 90% accuracy for 30 hours. “That might be enough to move that information to some less volatile technology—a retention of tens of hours isn’t a trade disruptor,” Strachan said.
In summary, “these new technologies that researchers are exploring are proof-of-concept cases that raise new questions about the challenges they may face in the future,” Strachan said. “They are also showing the path to contract manufacturers who need high-volume, low-cost commercial products.”
