[Abstract] This paper introduces a device control and diagnosis system based on the XILINX XC2S50 FPGA chip. Due to application requirements, the author designed it as a slave interface board, which can receive control commands from the host device and transmit diagnostic data to it. This interface board was successfully applied to the maglev suspending control system of a high-speed maglev train. [Keywords] FPGA; suspending interface board; diagnosis logic; center control logic 0 Introduction In general industrial control, in addition to sending control commands to slave devices, the master control device also needs to perform fault diagnosis on the slave devices and respond to the diagnostic results. With the development of DSP and FPGA technologies, industrial control has begun to utilize DSPs and FPGAs for industrial equipment control and diagnostics. FPGA technology allows the control and diagnostic logic of various devices to be implemented within the FPGA chip, replacing the original control and diagnostic circuits that implemented the corresponding logic functions. This significantly saves system space, reduces system power consumption, shortens the design cycle, and reduces design costs. This paper proposes a DSP and FPGA-based device control and diagnostic system to address practical needs. A master-slave structure is adopted, with the DSP as the master and the FPGA as the slave. The DSP implements the master control part, implementing various complex control algorithms, sending control commands to the slave, and reading diagnostic data from the slave. The FPGA implements the device control logic, reads diagnostic data from the controlled device, and sends it to the master. The system block diagram is shown in Figure 1. Figure 1: Device Control and Diagnostic Block Diagram 1. Hardware Circuit Implementation This system primarily uses the Xilinx XC2S50 chip to implement the FPGA slave function and the TI TMS320F2812 to implement the DSP master. This design is part of the levitation control system of a high-speed maglev train (hereinafter referred to as the train)—the levitation interface card. The levitation interface card mainly completes the control logic for the train's air spring control device and the levitation equipment position identification device, as well as the diagnostic detection of the working status of these two controlled devices. Figure 2 shows the hardware circuit block diagram of the levitation interface card. The interface card controls two devices: an air spring and a levitation chassis. It is also equipped with diagnostic logic to diagnose the operating status of both devices. The hardware structure is mainly divided into three hardware modules: the air spring control device, the installation position identification device, and the central control logic. Each module is described as follows: 1.1 Air Spring Control Device The main function of this module is to collect the air pressure status in the air spring and convert it into an electrical signal that can be received by the air spring control logic (one of the central control logic modules). In addition, it also receives the inflation/deflation commands from the air spring control logic and uses relays to switch the air spring inflation/deflation electronic valves, thereby realizing the inflation/deflation operation of the air spring. The air spring control algorithm is implemented in the central control logic. 1.2 Installation Position Identification Device Since there are many devices on the maglev train, each playing a different role during operation, each device has a unique equipment code for maintenance and diagnosis. For the levitation gearboxes, the main function is to enable the train to levitate. Each car has 20 levitation gearboxes on both sides. To effectively manage and maintain these gearboxes, each one has a unique installation position identification code. The main function of the installation position identification device is to collect the installation position identification codes of the levitation gearboxes, electrically isolate them, and convert them into a level data signal that can be received by the installation position shift register (one of the central control logic modules). 1.3 Central Control Logic This module is the core unit of the levitation interface card, implemented using FPGA technology with a XINLINX XC2S50 chip. The operating crystal oscillator is 10MHz. As shown in Figure 2, the central control logic FPGA module mainly implements three logic modules: air spring control logic, installation position identification shift register, and equipment diagnostic logic. Considering the numerous functions of this module, it is explained separately in Part 2, Central Control Logic Design and Implementation. 2. Central Control Logic Design and Implementation 2.1 Air Spring Control Logic The air spring control logic is based on the suspension state sent by the suspension controller and the air spring operating state sent by the air spring control device, and waits for the EL (exhaust signal) and BL (inflation signal) from the main control DSP to generate reasonable air spring control logic. 2.2 Shift Register for Identifying Installation Position The shift register for identifying the installation position transmits the 16-bit position code from the installation position identification device to the main control DSP via the synchronous serial data interface (MISO, CS_Sn, SCK). The installation position is read by the main control DSP through the CS_Sn signal. At this time, SCK is used as a synchronization pulse to read data from the register. Data is transmitted from MISO to the main control DSP. The 15th bit is transmitted first, then a shift operation is performed, and preparation is made for the transmission of the 14th bit. This process is repeated for each data word, as shown in Figure 3. After transmitting one data word, the SCK signal is turned off. The transmission timing is shown in Figure 4. Figure 3 shows the shift register reading diagram. Figure 4 shows the data transmission timing of the installation position shift register. One point to note is that since the position identification code only needs to be successfully read once during the preparation phase of the levitation train's power-on operation, and is not read again during normal train operation, the reading speed of the position code is not a primary design consideration. Therefore, a serial method is used to implement this function. 2.3 Equipment Diagnostic Logic The diagnostic logic mainly collects the following data: air spring status data from the air spring control device, intermediate data from the air spring control logic, and the position identification code from the installation position identification device, totaling 42 bits of diagnostic data. To meet the storage requirements of 42 bits of diagnostic data, the diagnostic logic is designed with six 8-bit wide registers. The diagnostic data is transmitted to the main control DSP through the 8-bit wide diagnostic bus D (0:7). The main control DSP assigns addresses to the five registers through address A (1:3) and commands the registers to read them with the help of CS_P_1n, as shown in Figure 2. If the data reading is complete, the contents of the registers are continuously updated. The address mapping table of the six registers is shown in Table 1. 3. Software Design All logic functions are implemented in the FPGA, and the programming language is VerilogHDL. The software design follows the top-down approach of the three modules described in Part 2, and the calling relationship between the modules is shown in Figure 5. Figure 5: Interface Board FPGA Integrated Logic System Call Structure Diagram. Explanation of each module name is shown in Table 2. Table 2: Software Design Reference Table 4. Conclusion This paper successfully implemented the required logic in the maglev train levitation interface card using FPGA. The FPGA was used to control two devices: the air spring and the levitation chassis installation identification device. Diagnostic logic for the operating status of these two devices was also designed. This approach of centralizing peripheral device control and diagnosis at the lower level greatly reduces the burden on the main controller, thereby significantly improving the main controller's control response frequency. This design has been successfully applied in the high-speed maglev train levitation system, greatly reducing the burden on the main control DSP, allowing the main control DSP to focus its main calculations on levitation-related algorithms. References [1] Xia Yuwen, Digital System Design Tutorial, Beijing University of Aeronautics and Astronautics Press, July 2003 [2] Wang Lingzhi, Lin Peijie, Huang Chunhui, FPGA Configuration and Interface Circuit Design, Journal of Electronic Measurement and Instrumentation, 2007.2:109-112 [3] XILINX Inc., XC2S50 datasheet, http://www.xilinx.com, 2003 [4] IEEE Computer Society, IEEE Standard Verilog® Hardware Description Language, The Institute of Electrical and Electronics Engineers, Inc. 28 September 2001 Author Biography Huang Bingnan, born in August 1983, is a postgraduate student majoring in Electromagnetic Suspension and Superconducting Engineering in the School of Electrical Engineering, Southwest Jiaotong University, class of 2005. His research direction is power electronics and suspension control. Mailing Address: P.O. Box 242, Southwest Jiaotong University, No. 111, North Second Ring Road, Chengdu, Sichuan Province, 610031, China Tel: +86 13550289157 Email: [email protected]