Introduction Serial communication is a crucial and widely used communication method between embedded systems such as microcontrollers and DSPs, as well as between embedded systems and PCs or wireless modules. In the hardware structure of embedded systems, there is typically only one 8-bit or 16-bit CPU, which must not only complete the main program flow but also handle various interrupts that occur at any time. Therefore, the serial communication program design in embedded systems differs significantly from that in PCs. If an interrupt service routine in an embedded system occupies a significant amount of time during system operation, another interrupt of the same or different type may occur while the interrupt service routine is running, causing the main program to fail to execute or subsequent interrupt data to be lost. Therefore, although serial communication in embedded systems seems simple, there are still many issues worth studying, such as the frame synchronization problem in serial communication. This paper addresses this problem by presenting three frame synchronization methods: successive comparison, FIFO queue-based, and state machine-based. Through testing, analysis, and comparison, it is concluded that the finite state machine-based method is a very effective frame synchronization method for serial communication in embedded systems and also a very good serial communication program design structure. 1. Serial Communication Data Frame Structure Modern industrial control often requires multiple independent control modules to jointly complete complex control processes via serial communication. Necessary communication protocols must be incorporated during communication to improve system reliability and stability. To implement specific communication protocols, a synchronization mechanism is required. The following describes a simplified serial communication data frame structure to analyze and explain frame synchronization methods in embedded system serial communication. Assume the serial communication data frame structure is as follows: Where: The header is used for synchronization and is generally one or more ASCII characters. In this paper, it is assumed that the data frame synchronization header has 2 bytes (0xAA, 0x55); the packet length indicates the number of bytes in the data packet excluding the header and packet length, usually represented by a pre-defined number of bytes; the type is the command type specified in the communication protocol; the data is the main information to be sent; and the checksum is usually achieved using a single-byte XOR method. 2. Frame Synchronization Methods in Serial Communication 2.1 Successive Comparison Frame Synchronization Method First, wait for serial port data. Compare the first byte of data received with the first byte of the agreed-upon header information. If they are incorrect, wait for a new byte until the received data matches the first byte of the header information. After the first byte comparison is correct, compare the second byte received with the second byte of the header information. If they are still correct, it means that the serial port reception has been synchronized and the data portion of the data frame can be received. Otherwise, restart the synchronization process. The program flow is shown in Figure 1. This method has a small code size and is simple to program. It is generally used in situations where serial port data is received in a non-interruptible manner in the main program, where real-time performance is poor, and data frames are short. However, when the serial port speed is too fast and the number of header bytes is large, the time spent on serial port synchronization is very long or it is difficult to achieve synchronization. For example, when the serial port receives the sequence 0x00 0xAA 0xAA 0x55..., when the first "0xAA" is encountered, this method assumes that the first byte is correct and starts comparing the second synchronization header. The second byte is still "0xAA" instead of "0x55", so it must wait for a new byte to start comparing the first synchronization header again. The next byte is "0x55", so the first byte of the packet header is not synchronized at this time. In fact, "0x00 0xAA" is a interference byte, and "0xAA 0x55" is the synchronization header in the communication protocol. 2.2 Frame Synchronization Method Based on FIFO Queue A global byte array of the same length is defined based on the length of the synchronization packet header. This array is considered as a first-in-first-out (FIFO) queue as shown in Figure 2. The program flow is shown in Figure 3. In this example, two bytes HEAD1 and HEAD2 are defined, both initialized to 0xFF. During synchronization, the array header byte HEAD1 is discarded, all data in the array is shifted forward one byte, and the new byte received by the serial port is stored in the last byte HEAD2 of the array. The entire array is compared with the packet header information in the protocol. If they are correct, the synchronized flag is set, and then the reception and storage of useful data begin; otherwise, the process continues to wait for the synchronization of serial port data reception. After the synchronization is complete, not only is the synchronized flag cleared, but both bytes HEAD1 and HEAD2 are also assigned the value 0xFF; otherwise, it will affect the synchronization and reception of the next frame of data. The previously mentioned sequence "0x00 0xAA 0xAA" is used. The test was conducted using the string "0x55…". As the serial port receive interrupted, the data in the synchronization queue was sequentially: [0xFF, 0xFF] → [0x00, 0xFF] → [0xAA, 0x00] → [0xAA, 0xAA] → [0x55, 0xAA]. At this point, the algorithm detected that [HEAD2, HEAD2] == [0x55, 0xAA], thus achieving synchronization. The synchronized flag was set so that the data portion of the data packet would be received the next time the serial port receive interrupt service routine was entered. Compared to the successive comparison frame synchronization method, this method can detect the synchronization header more quickly and accurately. However, if the header bytes are large, a large number of byte shifts must be performed each time the serial port interrupt service routine is entered during synchronization, which will inevitably consume a lot of time. To make the embedded system more robust, one of the basic principles of program design is to minimize the length of the interrupt handler. Therefore, the FIFO queue-based frame synchronization method is not optimal. 2.3 Finite State Machine-Based Frame Synchronization Method To solve the above problems, a finite state machine-based design method can be adopted. This method divides the data frame reception process into several states: HEAD1 state, HEAD2 state, packet length state, data type state, data reception state, and checksum state. The initial state of the system is HEAD1 state. The state transition diagram between each reception state is shown in Figure 4. Using the previously mentioned sequence "0x00 0xAA 0xAA 0x55…" for testing, as the serial port reception interrupts and new bytes are received, the system's reception state changes sequentially from HEAD1 to HEAD2 to HEAD2 to LEN. This indicates that the system is in a synchronization state. This method achieves synchronization quickly and effectively. However, it is important to note that after receiving a complete frame of data, the system's reception state must be reset to HEAD1; otherwise, it will affect the reception of the next frame. Afterwards, the program sequentially receives the data frame length, command type, data, and checksum according to the protocol. Once received, the system receive state is reset to HEAD1, and the data frame is checked. If the check is successful, a message mechanism is used to notify the main program to process the data frame or execute the corresponding command operation based on the command type. An example program of this method in Keil C51 is given below: Due to the use of a state machine and message mechanism, the above design quickly and effectively achieves serial communication synchronization. Moreover, the program structure is clear, easy to maintain, and easy to port to other serial communication protocols. In addition, the serial port interrupt service routine requires very little work; the average time for each serial port receive interrupt is no more than 20 machine cycles (in the AT89C51 microcontroller), greatly reducing the pressure on the serial port receive interrupt service routine, alleviating the contradiction between limited resources and requirements in the embedded system, and improving the stability of the embedded system. 3. Conclusion From the above analysis and testing, it can be seen that the serial communication frame synchronization method based on a finite state machine is the best among the three frame methods proposed in this paper, with a clear structure and high system resource utilization. For a serial port interrupt with a complete communication protocol, the design of the serial port interrupt service routine in an embedded system is more important because comparing command headers, performing verification, and parsing data requires a large number of machine cycles. In actual serial communication programs, a combination of state machine and message mechanism can be used. Only a flag is set in the interrupt service routine, and the main program processes the interrupt based on the corresponding flag. This avoids the problem that some interrupts may require a long processing time. In terms of program structure, the use of a state machine structure improves both readability and running speed. Therefore, this method is not only a good frame synchronization method, but also a very good serial communication program design method.