Abstract : This paper introduces the design of a CAN bus network adapter system based on the novel USB interface chip CH372, proposing a scheme to connect a CAN bus network to a computer using a USB interface. Utilizing the CH372 chip, parallel or serial port products can be easily upgraded to USB interfaces without understanding any USB protocols, firmware, or even drivers. Compared to previous systems, this system can more flexibly, quickly, and efficiently complete large-scale data exchange in industrial settings and can be applied to various control systems, demonstrating significant application value. Introduction The implementation of fieldbus network technology requires integration with computers. Currently, expanding CAN bus interface devices on microcomputers generally uses PCI or RS-232 buses. While PCI remains the primary channel for high-speed peripherals to interface with computers, its main drawbacks include limited system resources, limited expansion slot addresses, limited interrupt resources, inconvenient plugging and unplugging, high cost, complex design, the need for high-quality drivers to ensure system stability, and inability to be used for portable computer expansion. RS-232, while convenient to plug and unplug, has a very slow transmission rate. The design concept of this paper is to accurately and quickly transmit parameters between the computer and the CAN network control node by using the CH372 USB interface chip. The CH372 is a universal USB bus interface chip. In a computer system, the accompanying software of the CH372 provides a simple and easy-to-use operating interface, making communication with the local microcontroller as simple as reading and writing files on a hard drive. Because the CH372 shields all USB communication protocols, it can provide an end-to-end connection between the computer application layer and the local controller. Parallel and serial port products can be easily upgraded to USB interfaces without needing to understand any USB protocols, firmware, or even drivers. The CAN adapter is used to complete the data exchange between the USB bus and the CAN bus. The MCU is used to coordinate the data exchange between the USB bus and the CAN bus. The hardware can be divided into two parts based on the MCU: one is the MCU exchanging data with the USB bus; the other is the MCU controlling the CAN controller to complete the CAN data packet to CAN bus bit sequence protocol interpretation. The system structure is shown in Figure 1. Figure 1 Hardware Design USB Interface Circuit. There are two ways to choose between the microcontroller and the USB interface: one is to use a microprocessor with USB communication capabilities. With the increasing prevalence of USB applications, chip manufacturers such as Intel, Cypress, and Philips have launched microprocessors with USB communication interfaces, such as the 8X930A, 8X931A, and EZ-USB. Because these microprocessors have USB interfaces, they are incompatible with older development systems, requiring the purchase of new development systems and incurring significant investment. Another approach is to use a general-purpose microprocessor coupled with a dedicated USB communication chip. Popular dedicated chips currently include USBN9602, SL11, and PDIUSBD12. However, USB interface development generally requires designers to have a deep understanding of USB standards, firmware programming, and driver development, thus limiting the use of USB interface products by general hardware engineers. This system uses the CH372 USB interface chip, which is very easy to use. Developers only need to be familiar with microcontroller programming and simple VB or VC application programming to develop corresponding USB products in a short time. The CH372 is a general-purpose device interface chip for the USB bus, conforming to the USB 1.1 protocol. On the local side, the CH372 features an 8-bit data bus, read, write, and chip select control lines, as well as interrupt outputs, allowing for easy connection to the system bus of microcontrollers, DSPs, and other controllers. In computer systems, the CH372's accompanying software provides a simple and easy-to-use interface, making communication with the local microcontroller as simple as reading and writing files on a hard drive. The CH372 integrates the underlying protocols of USB communication, offering both built-in and external firmware modes. In built-in firmware mode, the CH372 shields all USB communication protocols, providing an end-to-end connection between the computer application layer and the local controller. Using the CH372, users can easily upgrade parallel or serial port products to USB interfaces without needing to understand any USB protocols, firmware, or even drivers. The CH372's RD and WR pins can be connected to the microcontroller's read and write strobe output pins, respectively. CS, driven by an address decoding circuit, is used for device selection when the microcontroller has multiple peripheral devices. INT can be connected to the microcontroller's interrupt input pin; interrupt requests are active low. When CS, RD, and A0 are all low, data in the CH372 is output through D7-D0; when CS, WR, and A0 are all low, data on D7-D0 is written into the CH372 chip; when CS and WR are both low and A1 is high, data on D7-D0 is written as a command code into the CH372 chip. The UD+ and UD- pins of the CH372 chip should be directly connected to the USB bus. If a fuse resistor or inductor is connected in series for chip safety, the AC/DC equivalent series resistance should be within 5Ω. The CH372 chip has a built-in power-on reset circuit, and generally does not require an external reset. The CH372 chip requires an external 12MHz clock signal for normal operation. Normally, the clock signal is generated by the CH372's built-in inverter through a crystal oscillator. The external circuit only needs to connect a 12MHz crystal between the X1 and X0 pins, and connect a 30pF high-frequency oscillation capacitor to ground for both X1 and X0 pins respectively. The CH372 chip supports either a 5V or 3.3V power supply. When using a 5V operating voltage, the VCC pin of the CH372 chip receives an external 5V power supply, and the V3 pin should be connected to an external power decoupling capacitor with a capacitance of approximately 0.1μF. When using a 3.3V operating voltage, the V3 pin of the CH372 chip should be connected to the VCC pin, simultaneously receiving an external 3.3V power supply. The operating voltage of other circuits connected to the CH372 chip should not exceed 3.3V. The interface circuit is shown in Figure 2. Figure 2: CAN Bus Interface Circuit. This part consists of a CAN controller, a CAN interface chip, and an optocoupler. The CAN controller fulfills all the requirements of the CAN communication protocol. The CAN interface chip is the interface between the CAN controller and the physical bus, and sends data to the CAN bus via the optocoupler. The interface circuit diagram is shown in Figure 3. Figure 3: CAN Bus Controller. The CAN bus controller uses Philips' SJA1000, supplemented by Philips' PCA82C250 interface driver. Isolation between the bus and the controller is achieved through the opto-isolator 6N137. The SJA1000 is a standalone controller used in automotive and general industrial environments. From a software perspective, operation of the SJA1000 is accomplished through microcontroller instructions accessing external memory; therefore, the SJA1000 can be considered an extended RAM. The SJA1000 has two application modes: standard mode and Peli mode. Standard mode conforms to the CAN 2.0A protocol standard, with a 64-byte receive buffer; Peli mode conforms to the 2.0B standard, can handle extended data formats, and features arbitration loss capture and code reading functions. The PCA82C250 is the interface between the CAN controller and the physical bus. It has a limited current value to protect the receiver output stage, preventing short circuits between the anode and cathode to avoid damage to the output stage. The PCA82C250 CAN interface controller provides bus-driven transmit and receive capabilities, with speeds up to 1Mbps and strong anti-interference capabilities. To enhance system anti-interference capabilities, two high-speed opto-isolators (6N137) are used between the SJA1000 and the CAN bus transceiver 82C250 to isolate the bus and controller, avoiding interference and improving operational reliability. The CAN controller can select to receive and transmit data from RX0, TX0, or RX1, TX1. When using RX0, TX0, RX1 must be connected to a stable voltage level. The high-speed optocoupler 6N137 has a maximum speed of 10Mbps, which can be used to ensure high-speed and reliable operation of the system in isolation. Software Design The microcontroller used in this design is the P89C51RD2, a single-chip 8-bit microprocessor using advanced CMOS technology. Operating in 6-clock mode, its speed is twice that of a standard 51 microcontroller, and the maximum external crystal oscillator frequency can reach 20MHz. Furthermore, this model supports ISP programming and IAP programming. The flowchart of the main software program is shown in Figure 4. Figure 4 first initializes the MCU, SJA1000, and USB. After initialization, the system is in a loop waiting state. If an interrupt occurs, the corresponding interrupt service routine is entered. If there is data uploaded to the CAN bus, the CAN interrupt service routine is entered, where the microprocessor receives data from the SJA1000 buffer, writes it to the microprocessor's data buffer, sets the flag, and returns. If there is data downloaded from the host computer, the USB interrupt service routine is entered (the lower-level interrupt service routine flowchart is shown in Figure 5). The microprocessor reads data from the USB buffer, stores it in the buffer, sets the flag, and returns. Receiving data involves reading the data from the buffer and sending it to the USB bus, which then transmits it to the host computer (the simplified flowchart of the lower-level data upload subroutine is shown in Figure 6). Sending data involves reading the data from the buffer and writing it to the SJA1000 buffer, which is then read by the CAN node. This process allows the microprocessor to complete the data exchange between the host computer and the lower-level computer simply by reading the buffer after executing the corresponding interrupt routine and then executing the corresponding receive or send routine. For computer application layer programs, after installing the CH372 universal driver provided by WINCHIPHEAD on the computer, it is unnecessary to consider the USB communication protocol, firmware, driver, automatic configuration process, and low-level data transmission process. Only the interface functions of the provided dynamic link library need to be used to develop your own application program in VB or VC. (Figures 5 and 6 are referenced in the original text .) In summary, this system provides an effective method for direct communication between a computer and the CAN bus. Adapting to the development of network and interface technologies and exploring new methods for fieldbus networks and computer interfaces is of great practical significance.