Abstract: This paper introduces a solution for bridging different fieldbus networks. The solution uses the high-performance AVR ATmega128 as its control core. The AVR ATmega128 communicates with the computer using the ModBus/RTU protocol and communicates with other sub-control devices through a multi-processor communication mode. The solution has been tested in practice, proving its feasibility. Keywords: AVR ATmega128, Modbus/RTU, AVR multi-processor communication mode, CRC16 1 Introduction Today, electronic technology is developing rapidly, especially with the widespread application of microcontrollers in fields such as communication, transportation, home appliances, portable smart instruments, and robot manufacturing. Product functionality, accuracy, and quality have significantly improved, and circuits are simple, with low failure rates, high reliability, and low cost. In some microcontroller applications, the increasing demand for network flexibility and diversity makes network interconnection increasingly important. Industrial gateways provide a solution for bridging different fieldbus networks. 2 Network Topology The network connection topology is shown in Figure 1. RS-232C is a widely used serial communication standard, but due to its early introduction, it has revealed significant drawbacks in modern network communication, such as slow data transmission speed, short transmission distance, and susceptibility to interference between signals at the interface. RS-485 is a multi-transmitter circuit standard that extends the performance of RS-422A, allowing one transmitter to drive 32 load devices over a twisted pair. The load devices can be passive transmitters, receivers, or transceivers. RS-485 has a maximum transmission distance of 1200m and a maximum transmission rate of 10Mb/s. Therefore, RS-485 is highly attractive in long-distance communication and multi-machine bus systems. As shown in Figure 1, the standard Universal Asynchronous Receive/Transmit Interface 0 (UART0) of the AVR ATmega128 is converted into a half-duplex 485 serial port. Similarly, the PC's RS-232C serial port is also converted to a 485 serial port. They communicate using the Modbus/RTU protocol, with the AVR ATmega128 acting as a slave device. The AVR ATmega128 and its downstream AVR sub-controllers are connected in parallel via a 485 serial bus. They communicate using AVR's proprietary multi-machine communication method. The AVR ATmega128 is the master controller, and the other AVR sub-controllers are slave controllers. The AVR ATmega128 microcontroller is an 8-bit low-power CMOS microprocessor based on the AVR RISC architecture. Due to its advanced instruction set and single-cycle instruction execution time, the ATmega128 microcontroller boasts a data throughput of up to 1 MIPS/MHz, thus mitigating the trade-off between system power consumption and processing speed. The AVR microcontroller core features a rich instruction set and 32 general-purpose working registers. All registers are directly connected to the Arithmetic Logic Unit (ALU), allowing an instruction to access two independent registers simultaneously within one clock cycle. This architecture significantly improves code efficiency and provides up to 10 times the data throughput of typical complex instruction set microprocessors. The ATmega128 microcontroller features 128KB of in-system programmable Flash program memory with read-while-write capability (RWW); 4KB of EEPROM; 4KB of SRAM; 53 general-purpose I/O port lines; 32 general-purpose working registers; a real-time clock (RTC); four flexible timer/counters (T/C) with compare mode and PWM functionality; two USARTs; a byte-oriented two-wire interface (TWI); an 8-channel 10-bit ADC; selectable programmable gain; a programmable watchdog timer with an on-chip oscillator; a Serial Peripheral Interface (SPI); a JTAG test interface compliant with the IEEE 1149.1 standard, which can also be used for on-chip debugging; and six software-selectable power-saving modes. The Modbus communication protocol is a universal language used in electronic controllers. Through this protocol, controllers can communicate with each other and with other devices via networks (such as Ethernet). It has become a universal industry standard. With it, control devices from different manufacturers can be connected to form an industrial network for centralized monitoring. This protocol defines a message structure that a controller can recognize, regardless of the network over which they communicate. It describes the process of a controller requesting access to other devices, responding to requests from other devices, and how to detect and log errors. It establishes a common format for message field layout and content. When communicating on a Modbus network, this protocol dictates that each controller must know its device addresses, recognize messages sent at those addresses, and determine the appropriate action. If a response is required, the controller generates feedback information and sends it using the Modbus protocol. On other networks, messages containing the Modbus protocol are converted into frame or packet structures used on that network. This conversion also extends the methods for handling node addresses, routing paths, and error detection based on the specific network. Modbus networks can be configured to communicate in either of two transmission modes (ASCII or RTU). The user selects the desired mode, including serial communication parameters (baud rate, parity, etc.). When configuring each controller, all devices on a Modbus network must select the same transmission mode and serial parameters. When a controller is configured to communicate in RTU (Remote Terminal Unit) mode on a Modbus network, each 8-bit byte in the message contains two 4-bit hexadecimal characters. The main advantage of this method is that it can transmit more data than ASCII at the same baud rate. Code System: ü 8-bit binary, hexadecimal numbers 0...9, A...F ü Each 8-bit field in the message consists of two hexadecimal characters forming each byte: ü 1 start bit ü 8 data bits, the least significant bit is sent first ü 1 parity bit, none if no parity ü 1 stop bit (with parity), 2 bits (without parity) Error Detection Fields ü CRC (Cyclic Redundancy Check) Using RTU mode, message transmission must begin with a pause interval of at least 3.5 character times. This is the easiest to implement under diverse character times in a network (as shown in Figure 2 below). The first field transmitted is the device address. The usable transmission characters are hexadecimal 0…9, A…F. Network devices continuously monitor the network bus, including during the pause interval. When the first field (address field) is received, each device decodes it to determine if it is destined for itself. After the last transmitted character, a pause of at least 3.5 character duration marks the end of the message. A new message can begin after the pause. The entire message frame must be transmitted as a continuous stream. If there is a pause of more than 3.5 character duration before the frame is complete, the receiving device will refresh the incomplete message and assume the next byte is the address field of a new message. Similarly, if a new message begins after the previous message in less than 3.5 character duration, the receiving device will consider it a continuation of the previous message. This will result in an error because the value of the final CRC field cannot be correct. A typical RTU message frame is shown below: When messages are transmitted over standard Modbus networks, each character or byte is sent as follows (from left to right): Least significant bit... Most significant bit. When using RTU character frames, the bit sequence is: 5 CRC16 Check Cyclic Redundancy Check (CRC) technology is widely used in measurement, control, and communication fields. CRC calculation can be implemented using dedicated hardware. However, for low-cost microcontroller systems, implementing CRC checks without hardware support hinges on how to perform the CRC calculation in software—that is, the CRC algorithm itself. There are three algorithms for calculating CRC16: bitwise CRC, byte-wise CRC, and half-byte-wise CRC. These algorithms differ slightly: bitwise calculation is slower but uses the least memory; byte-wise CRC lookup is faster but uses more memory; half-byte-wise CRC lookup strikes a balance between the two, using minimal memory while maintaining sufficient speed, making it suitable for 8-bit microcontrollers with limited memory. 6. AVR Microcontroller Multiprocessor Communication Mode Setting the Multiprocessor Communication Mode (MPCM) bit on the UCSRA allows filtering of data frames received by the USART receiver. Frames without address information are ignored and not stored in the receive buffer. In a multiprocessor system, where processors communicate via the same serial bus, this filtering effectively reduces the number of data frames that the CPU needs to process. The setting of the MPCM bit does not affect the transmitter's operation, but its usage differs in systems using multiprocessor communication. If the receiver receives a data frame of 5 to 8 bits in length, the first stop bit indicates whether the frame contains data or address information. If the receiver receives a data frame of 9 bits in length, the 9th bit (RXB8) determines whether it is data or address information. If the bit determining the frame type (the first stop bit or the 9th data bit) is 1, it is an address frame; otherwise, it is a data frame. In multiprocessor communication mode, multiple slave processors can receive data from a single master processor. First, the address frame must be decoded to determine which processor is being addressed. If a processor is addressed, it will receive subsequent data normally, while other slave processors will ignore these frames until another address frame is received. For a master processor, it can use a 9-bit data frame format (UCSZ = 7). If an address frame (TXB8 = 1) is transmitted, the 9th bit (TXB8) is set to 1; if a data frame (TXB = 0) is cleared, it is zeroed. In this frame format, the slave processor must operate in 9-bit data frame format. The following are the steps for data exchange in multiprocessor communication mode: 5.1 All slave processors operate in multiprocessor communication mode (MPCM bit in the UCSRA register is set). 5.2 After the master processor sends an address frame, all slave processors receive and read this frame. The RXC bit in the slave processor's UCSRA register is normally set. 5.3 Each slave processor reads the contents of the UDR register to determine if it is selected. If selected, it clears the MPCM bit in the UCSRA register; otherwise, it waits for the next address byte and keeps MPCM at 1. 5.4 The addressed slave processor receives all data frames until it receives a new address frame. Slave processors that keep the MPCM bit at 1 ignore these data frames. 5.5 After receiving the last data frame, the addressed processor sets MPCM and waits for the master processor to send the next address frame. Then, steps 2 and later are repeated. Using a 5- to 8-bit frame format is possible, but impractical because the receiver would have to switch between using n and n+1 frame formats. This setup makes full-duplex operation difficult because both the receiver and transmitter use the same character length setting. If a 5- to 8-bit frame format is used, the transmitter should set two stop bits (USBS = 1), with the first stop bit used to determine the frame type. Do not use read-modify-write instructions (SBI and CBI) to manipulate the MPCM bit. The MPCM and TXC flags use the same I/O unit, and using SBI or CBI instructions may accidentally clear it to zero. In this design, the AVR ATmega128 acts as the master processor in a multi-processor communication mode, with other AVR sub-processors acting as slave processors. 7 Conclusion The network topology introduced in this scheme is based on the Modbus standard protocol for communication between AVR ATmega128 and the host computer, while the communication between AVR ATmega128 and other AVR sub-control devices is based on the multi-processor communication unique to AVR microcontroller. Therefore, while ensuring the openness of the system, it can also ensure the improvement of data processing efficiency. This design scheme has certain reference value in traffic control, intelligent parking management system and other aspects. References [1] Chen Dongyun, Du Jingcang, Ren Keyan. ATmega 128 microcontroller principle and development guide. Machinery Industry Press, 2006. [2] Richard Barnett, Larry O'Cull, Sarah Cox. Embedded C programming and Atmel AVR. Beijing: Tsinghua University Press, 2003. [3] Modicon. Modbus Protocol Reference Guide. 1996 [4] Zhu Yi, Jiang Nianping. Application of ModBus protocol in industrial control system. Microcomputer Information, 2006, 4-1: 118-120.