Abstract : This paper introduces an embedded Ethernet design scheme based on ARM9. Based on the functional characteristics of the ARM core microprocessor S3C2410 and its external components, the performance of the Ethernet controller chip RTL8019AS and its interface with S3C2410 are analyzed. In terms of software design, the role of the BootLoader is analyzed, Linux porting is introduced, and a flowchart of the communication program is given, realizing embedded Ethernet data transmission. Keywords : Embedded system; Gateway; ARM; Porting Introduction The ubiquitous network has brought tremendous development opportunities to network access devices. With the rapid growth of the network access market, embedded network access has become one of the most attention-grabbing areas in embedded system technology. Driven by embedded network technology, a situation will emerge where 70% of the information transmitted over the network will originate from embedded systems. Perhaps hundreds of millions of cars, communication devices, home appliances, and factory systems will connect to different networks, eventually forming a vast Internet. Therefore, this paper studies an embedded gateway based on an ARM chip and the embedded operating system Linux, which exchanges data between Ethernet and RS-485 bus to meet the networking functional requirements of embedded devices. Hardware Platform Design The designed embedded gateway uses the ARM920T as its core and the S3C2410 microprocessor as its core. The hardware platform is constructed through external memory, Ethernet ports, serial ports, and JTAG debugging interfaces. Its hardware structure block diagram is shown in Figure 1. CPU Design: The CPU is the real-time control core of the entire embedded system. In industrial Ethernet, it acts as the main controller of the intelligent node and is the core of the entire embedded gateway. This paper selects the S3C2410 microprocessor with the ARM920T as its core. The S3C2410 is a 32-bit RISC microprocessor, particularly suitable for handheld devices and cost-effective, low-power network devices. It integrates rich resources such as an LCD controller, USB Host, NAND controller, BUS controller, interrupt control, power control, memory control, UART, WatchDog, SPI, SDI/MMC, IS, IC, GPIO, RTC, TIMER/PWM, and ADC. Storage System: Embedded systems can customize storage space as needed. This paper expands the storage with two Flash chips and one SDRAM chip. The Flash chips primarily consist of one 2MB 16-bit Flash chip HY29LV160B191 from Hyundai (Korea) and one 16MB NAND Flash chip K9F2808UOB1571 from Samsung (Korea). The SDRAM chip used is one SDRAM HY57V5616201 manufactured by Hyundai (Korea). The 2MB Flash chip HY29LV160B's address space is mapped to address 0x00000000, serving as the program space for storing boot configuration parameters and exception/interrupt vector tables. Instructions are read from this space to execute the program after system reset. The 8MB SDRAM HY57V561620 from Hyundai (Korea) is used as system memory, with its address space mapped starting at address 0x30000000, serving as the program execution space and data space. The boot code copies the system image to the SDRAM before execution. The serial port design utilizes two UART channels. One channel uses a MAX232 level converter chip to convert the 3.3V logic level to RS-232-C logic level for transmission, enabling communication between the ARM processor and the PC. Debugging can be performed on the PC via a terminal emulator. The other serial interface uses a MAX1485 level converter to receive information from the fieldbus on the RS-485. The JTAG debugging interface is essential for chip programming and debugging in embedded systems, allowing for real-time analysis and monitoring of program execution. JTAG (Joint Test Action Group) is an IEEE standard that allows communication with the ARM CPU core via existing JTAG boundary scans. It is a completely non-pluggable (does not occupy on-chip resources) debugging method, requiring no target memory or ports on the target system, which are necessary for typical resident monitoring software. Furthermore, the target program debugged by JTAG executes on the target board, providing a simulation closer to the target hardware and yielding results more closely resembling the real operating environment. Therefore, it is increasingly becoming a widely adopted debugging method. The Ethernet interfaces used in this paper employ the RTL8019AS, 74LVC4245, and FB2022 (NIC transformer). The RTL8019AS is a cost-effective, plug-and-play full-duplex Ethernet controller. Its key features include: compliance with EtherNet II and IEEE 802.3 standards; full-duplex operation with simultaneous transmit and receive speeds up to 10Mb/s; built-in 16KB SRAM for transmit and receive buffering, reducing the demands on the main processor; support for automatic UTP, AUI, and BNC detection; automatic polarity correction for 10BaseT topologies; and programmable output from four diagnostic LED pins. The RTL8019AS has two internal RAM blocks: a 16KB block (addresses 0x4000～0x7fff) and a 32-byte block (addresses 0x0000～0x001f). RAM is stored in pages, with each page consisting of 256 bytes. In this design, the first 12 pages (0x4000～0x4Bfff) of the RTL8019AS RAM are used as a transmit buffer; the next 52 pages (0x4c00～0x7fff) are used as a receive buffer; page 0 contains only 32 bytes and is used to store the Ethernet physical address. Pins SA0～SA19 of the RTL8019AS chip are the address bus; SD0～SD15 are the data bus; pin INT0 connects to the external interrupt signal of the S32C410 chip; pin AEN is the address enable pin, acting as the chip's strobe signal to map the interrupt to the CPU's nGCS3 address to bank3. The address space range of the RTL8019AS is 0x18000300～0x1800031f. Pins IOS0～3 are set to ground or idle, indicating that the RTL8019AS internal register bus address starts from 300H. Pins X1 and X2 connect to a 20MHz passive crystal oscillator as an external clock signal input; pin JP is connected to a high level to select jumper mode; pins IORB and IOWB serve as input/output read/write command terminals; pin RSTDRV is the reset terminal, connected to the reset signal; pins SMEMRB and SMEMWB are the chip's memory read and write commands. Pins TPIN+, TPIN-, TPOUT+, and TPOUT- are media interface pins, required for receiving IP datagrams. In the design of the network card chip circuit, they are connected to the RJ-45 network external interface through an isolation transformer. The external host connects to the RJ-45 interface via an Ethernet cable to achieve data exchange. The TD+ pin of the isolation transformer connects to the TPOUT+ pin of the network card chip; TD- connects to TPOUT-; RD+ connects to TPIN+; RD- connects to TPIN-. The 8019 connects to the RJ-45 via the isolation transformer to achieve the reception and transmission of IP datagrams with the host. In addition, the hardware part also includes power supply circuit, crystal oscillator circuit, and reset circuit, which will not be introduced in detail here. Software part design The software part of the embedded system is divided into three parts: writing the BootLoader, porting the operating system and file system, and writing the application program. Writing the BootLoader The BootLoader is the first piece of software code that runs after the system is powered on, that is, a piece of code that is executed after the processor chip is reset and before entering the operating system. It mainly provides a basic running environment for running the operating system, such as initializing the CPU stack and initializing the memory system. The BootLoader code is related to the kernel structure of the CPU chip, the specific chip and the operating system used, and its function is similar to the BIOS of a PC. By running the BootLoader program, hardware devices such as memory can be initialized and a memory space mapping can be established, thereby bringing the system's hardware and software environment to a suitable state and preparing the correct environment for the final call to the operating system kernel. The general steps for writing it are: (1) Mask all interrupts. Providing services for interrupts is usually the responsibility of the operating system or device driver. Therefore, it is not necessary to respond to any interrupts during the execution of the BootLoader; (2) Set the interrupt vector; (3) Set the memory control register; (4) Initialize the stack and registers. System stack initialization depends on which interrupts the user uses, what error types the system needs to handle, and the definition of several processor operating modes. Generally, the manager stack must be set, and if IRQ interrupts are used, the IRQ stack must also be set; (5) If necessary, the processor mode and state need to be changed; (6) Initialize the memory space required by the C language. To run the application correctly, the data and variables that the system needs to read and write should be copied from ROM to RAM during initialization. Some programs that require fast response, such as interrupt handlers, need to run in RAM; if Flash is used, the erase and write operations of Flash are also run in RAM. The startup program of the embedded system is heavily dependent on the hardware, so it needs to be written in assembly language. After completing the above steps, the system has completed the initialization of the hardware and software operating environment. Finally, the real-time operating system code is read from Flash into the memory space and the real-time operating system starts running. Operating system and file system porting Linux, as an excellent operating system, has emerged in the embedded field in recent years and has become the most promising embedded operating system. One of its outstanding advantages is its royalty-free and open-source nature. Furthermore, it can be applied to various hardware platforms, possessing good portability, high reliability, excellent network functionality, a complete file system, and rich APIs, providing powerful software support for embedded gateways. Therefore, this paper chooses Linux as the operating system for the embedded gateway. The Linux porting process involves the following steps: (1) Downloading the Linux source code and establishing a cross-compilation environment; (2) Configuring and compiling the kernel; (3) Creating a file system and writing the corresponding device drivers; (4) Downloading, debugging, and executing the kernel, and adding your own application to the file system. Application Development: This paper uses Socket sockets and the TCP/IP protocol to develop a simple client/server network application. Because this system only acts as a gateway, it only needs to implement communication between the fieldbus and the Ethernet host computer, without needing to process the logical meaning and content of the data. In this mode, the Ethernet host computer is configured as a server, running the server-side application. This program is mainly used to listen to the server port, accept client connection requests, receive client information, and send information to clients. The gateway system runs a client program, which is mainly used to request a connection to the server, send messages from the fieldbus to the server, process information sent by the server, and send this information to the fieldbus system. The application software flow is shown in Figure 2. The main functions called in the software are: (1) intsocket(intfamily, inttype, intprotocol). This function creates a port for communication. If the call is successful, it will return an integer file descriptor. If the call is erroneous, it will return -1. (2) intbind(intsockfd, conststructsockaddr *address, size-taddress-len). Once the Socket call is successful and a file descriptor is returned, this function associates the Socket with a port on the server machine, and can listen for service requests on that port. This function is only used by the server program and the client does not need to call this function. (3) intlisten(ints, intbacklog). The server listens for service requests. (4) intaccept(intsockfd, void *addr, int *addrlen). The service request to connect to the port. However, when a client attempts to connect to the port the server is listening on, the connection request will be queued and wait for the server to call this function to accept it. (5) intsend(intsockfd, const void *msg, intlen, intflags); recv(intsockfd, void *buf, intlen, unsigned intflags). Send and receive data. (6) intconnect(intsockfd, structsockaddr *serv-addr, intaddrlen). This function is used to establish a TCP connection with a remote server. (7) intclose(intsockfd). End data transmission. Conclusion This article introduces the specific software and hardware methods of embedded Ethernet interface based on S3C2410 processor and RTL8019AS as network interface chip. It can be used to realize automatic Internet access of field nodes in industrial fields, thereby realizing remote control of the field, and has good development prospects.