What is chip reverse engineering? Reverse engineering is essentially chip reverse engineering. It involves extracting, analyzing, and organizing the internal circuitry of a chip to gain a deep understanding of its technical principles, design concepts, manufacturing processes, and structural mechanisms. This understanding can be used to verify design frameworks or analyze technical issues in information flow, and can also assist in new chip or product design solutions.
The significance of chip reverse engineering: The modern IC industry is highly competitive, with products constantly evolving, forcing IC design companies to continuously develop new products to maintain their competitiveness. IC design companies often have to enter completely unfamiliar application and technology fields based on market demand, which is a high-risk investment. Understanding the cost and technological advantages of competing chips is essential. Enabling engineers to design circuits efficiently in the shortest time is the most challenging problem, and reverse engineering appears to be one solution. Reverse engineering can reconstruct the entire IC from packaging and fabrication to circuit layout, restoring its internal structure, dimensions, materials, manufacturing processes, and steps. Furthermore, it can extract circuit layouts to reconstruct the circuit design.
Currently, integrated circuit design is very mature abroad, with the latest foreign processes reaching 10nm, while China is still in the development stage, with the latest processes reaching 28nm. I won't go into detail about the development of integrated circuits; there's plenty of information online. For IC designers, understanding the entire IC design process is extremely helpful. However, there doesn't seem to be a very detailed introduction to the entire IC design process online. Most sources only give a general overview, dividing it into four main sections: design, manufacturing, testing, and packaging. Some information is scattered, focusing on a single detail, while others only discuss the use of a particular software tool without specifying which process it's used in. Furthermore, the specific software tools used in each process are not clearly defined (this is based on personal experience and may not be entirely accurate).
Chip forward design and reverse engineering. Currently, major international chip design companies primarily use forward design, with reverse engineering mainly used to check for plagiarism. While reverse engineering was originally intended to prevent chip copying, it has evolved into a solution for smaller companies seeking faster and more cost-effective chip design. More and more domestic companies are gradually shifting towards forward design, reducing their reliance on reverse engineering. Of course, many companies in their early stages of development still engage in reverse engineering.
This article summarizes the process starting with chip reverse engineering.
"To do a good job, one must first have the right tools." With the continuous development of integrated circuits, both forward and reverse design of chips are becoming increasingly reliant on tools. Therefore, before discussing the design process, let's take a look at the main tools and auxiliary software we will use.
When discussing design tools, one cannot ignore the three major EDA vendors: Cadence, Synopsys, and Mentor. These three companies' software covers almost all the tools available in the chip design process. First, there's Cadence, whose most important IC design tools include the Cadence IC series, encompassing IC 5141 (the latest version is IC617), NC_VERILOG (Verilog simulation), SPECTRE (analog simulation), ENCOUNTER (automatic placement and routing), and more. Synopsys is best known for its synthesis tool Design Compiler, timing analysis tool PrimeTime, and simulation tool Hspice. Mentor's most famous tools are Calibre (layout DRC LVS checking) and Modelsim (Verilog simulation).
These are the most commonly used tools in IC design, whether for forward or reverse engineering. Of course, as software versions are updated, the names may change; they won't be the names mentioned above. Furthermore, these tools primarily run on Linux-based operating systems, with Red Hat being a prime example. Therefore, it's necessary to learn about Unix/Linux operating systems, as they differ significantly from Windows. To learn how to use these software programs, you must first understand the relevant operating system concepts; there is plenty of information available online. Some tools have Windows versions, such as Hspice and Modelsim.
Of course, besides the IC design tools from these three major EDA vendors, software from Altera, Xilinx, and Keil Software, such as Quartus II, ISE, and the KEIL development environment, are also indispensable tools in the IC design flow. These are used for FPGA, microcontroller, and ARM chip development, respectively. This type of software is used in chip CP testing and chip application solution development.
Layout extraction tools, such as NetEditorLite and ChipAnalyzer, are primarily used for chip reverse engineering.
MATLAB is an algorithm design tool with a wide range of applications, but for chip design, it is more suitable for algorithm prototype development, such as communication algorithms.
PCB layout tools include Altium Designer, Orcad, and Allegro. Currently, Orcad and Allegro are the main software within the Cadence circuit system design suite, while Altium Designer is the most commonly used; its predecessor was Protel.
LabVIEW and Digital Source Table, this hardware and software pair, are primarily used for semi-automated testing of chip electrical parameters, especially analog chips. Their purpose is for chip design companies to analyze chip sample parameters.
