PC-based microprocessor-based protection and automation system for 35kV/10kV substations
2026-04-06 04:50:05··#1
Abstract: Industrial computer-based protection and automation systems have many advantages and broad development prospects. Based on the MIC2000 series industrial computer and the WINDOWS CE embedded operating system, combined with a self-developed microcomputer protection intelligent synchronous data acquisition card based on the ISA bus, this system realizes the functions of microcomputer protection and automation in small and medium-sized 35KV/10KV substations. The protection implementation method of industrial computer-based protection devices differs greatly from that of microcontroller-based relay protection devices. An in-depth study was conducted on the algorithm for implementing multi-channel protection using a single CPU. By adopting parallel processing and multi-threading technologies, the system can still guarantee the speed requirement of protection when multiple lines fail simultaneously. This paper provides a detailed introduction to the system's hardware composition, system software planning and design, protection algorithm implementation, and underfrequency load shedding. Keywords: Microcomputer protection; Automation; Industrial computer; WINDOWS CE; Underfrequency load shedding 1 Introduction To date, microcomputer protection and automation devices in power systems have been distributed and installed independently. Devices communicate with each other via fieldbus to transmit measurement, control, and fault information. The author attempts to develop an integrated centralized microcomputer protection and automation system suitable for 35kV/10kV substations, based on mature industrial control computer hardware and the support of the Windows operating system. Early in the research of microcomputer protection, G.D. Rockefeller, Vice Chairman of the International Electricity System Committee and a pioneer in this field, studied the use of a single computer to protect all electrical equipment in a substation in the late 1960s. However, due to the limitations of computer technology at the time, using a single computer to protect all equipment in a substation—and using repetitive settings to improve reliability—was considered technically and economically infeasible. Now, industrial control computers based on x86 series CPUs can reach clock speeds of several hundred megahertz, possessing powerful data processing capabilities and fast real-time response speeds. Combined with a self-developed intelligent synchronous data acquisition card for microcomputer protection, a single industrial control computer can fully realize all protection and automation functions in small and medium-sized substations with a master-slave structure. To improve system reliability, a dual-machine hot standby mode can be adopted. The protection and automation system based on the PC bus industrial control computer has the advantages of high performance-price ratio, strong anti-interference ability, stable and reliable operation, user-friendly interface, modular structure, good compatibility and easy upgrade, rich software and hardware resources, and strong communication networking function. It is easy to realize the integration of protection, control, measurement and data communication functions [1][2]. 2 System overall structure The device uses the MIC2000 series PC compatible industrial control computer of Taiwan Advantech. The product has good shock resistance and anti-electromagnetic interference ability. It adopts a front-mounted 19-inch standard chassis with 11 slots of ISA bus motherboard, 250W industrial grade power supply, and push-pull dual fan cooling system to generate positive air pressure in the chassis, prevent dust from entering, and maintain efficient heat dissipation. The CPU motherboard is MIC2350, equipped with a Pentium 266MHz CPU, 64M memory and integrated graphics card, network card, CRT and LCD flat panel display driver. It is equipped with a standard parallel port, a standard 232 serial port and a serial port that can be set to 232 or 485 or 422 by jumper. The switch input/output boards all use MIC2000 series products, and all boards are equipped with opto-isolation. 3. Operating System Selection [3][4] Currently popular PC operating systems include WINDOWS-98, WINDOWS 2000, and WINDOWS-NT. Due to its user-friendly window interface, it is very popular among users and is also the most familiar to computer users. However, a complete operating system requires several hundred megabytes of hard disk storage space, and many components are simply not needed for single-function application system software. Industrial environments require high reliability, and the reliability of rotating storage media like hard disks is low. Electronic disks (FLASH cards, etc.) are required. However, large-capacity electronic disks are expensive. Therefore, Microsoft developed the WINDOWS CE embedded operating system. It is a lightweight, multi-threaded, real-time, modular, and graphical operating system. Its advantages lie in its low resource consumption, WIN32 API subset, and multi-platform support capabilities. It can package user programs according to user resource configurations. It has been widely used in PDAs (handheld computers). The use of WINDOWS CE in China is still in its early stages, and there are not many mature products. However, its development prospects are very optimistic, therefore WINDOWS CE is more suitable for this system. 4. Hardware Structure and Circuit Composition of the Microcomputer Protection Intelligent Synchronous Data Acquisition Card The microcomputer protection intelligent synchronous data acquisition card (hereinafter referred to as the protection card) is the core of this system. The card uses an Intel 80C196KC 16-bit microcontroller as the CPU. The A/D converter uses the AD7874 from Analog Devices. This chip is a 4-channel, 12-bit synchronous data acquisition system. The AD7874 has a power supply voltage of ±5V and an input range of ±10V. It has a built-in sample-and-hold circuit and a high-precision reference voltage source. The simultaneous startup of the 4-channel A/D conversion enables synchronous sampling, which is particularly suitable for protection needs. The total conversion time for the 4 channels is 31μs. There are 3 AD7874 chips on the card. The card uses DC-DC converters and fast optocouplers to isolate the A/D conversion circuit from the system bus and DC power supply, effectively suppressing mutual interference and improving acquisition accuracy and system stability. After DC-DC power supply isolation, the power supply noise of the A/D converter is reduced to 1/5 of that on the primary side. The hardware block diagram of this card is shown in Figure 1. The fast optocoupler uses HP's HCPL263N, with a coupling speed of 10MHz and a drive current of 2mA. When the 80C196 clock is set to 12MHz, the CPU can directly read or write data from the AD7874 without adding a wait delay. The peripheral circuit configuration of the HCPL263N is shown in Figure 2. The truth table of the HCPL263N input/output logic is shown in Table 1. The communication interface between the OFFH protection card and the PC is implemented using Xilinx's XCR5128. This chip uses a CMOS process and a power-saving design, belongs to the COOLRUNER series, and is packaged in a PLCC84 package with 64 I/O pins, including 4 pure input pins. The 4 clock pins and 4 programming pins can also be used as I/O. When CK1 is used as a clock, it can only be connected to an external clock. When CK2, CK3, and CK4 are used as clocks, they can be connected to an external clock or generated by internal logic circuits. However, when used as internal clocks, they cannot be used as input pins. This chip has 128 macrocells, which can be flexibly programmed to implement various functions, saving wiring space on the circuit board and improving reliability [3][4]. On this card, the XCR5128 is the data exchange hub. It simultaneously implements the address decoding of the 80C196 microcontroller to the peripheral chips, the PC bus address decoding and control logic, the reading of A/D conversion results, the read and write control logic of five 16-bit dual-port RAMs, and the implementation of the mutual interrupt request logic between the PC and the 80C196 microcontroller. 5 System Software Planning and Design To make the system software more compatible and easier to maintain, VC++ language, object-oriented programming methods, and database technology were adopted. The system's scale and functions are described using a database. The system's structure can be easily expanded and functions added or removed by adding or modifying database records, thus achieving system configuration design. Because it needs to protect and monitor multiple lines, the response to emergency events must be rapid and timely, and the special case of simultaneous failures on several lines must be considered. Therefore, hardware-triggered interrupt service routines and multi-threaded functions launched in the application were developed. 5.1 Data Organization and Database Management The database is an important component of this system software. Users configure the system's functions and composition through the database. The system configuration is flexible and convenient. Various operation records can be viewed at any time and can be printed or uploaded. ADO technology is used to implement database connections, facilitating the implementation of network database interfaces. The system database includes line parameter database tables, protection setting database tables, acquisition card parameter database tables, system parameter database tables, system operation history data record database tables, fault record database tables, and operation record database tables, etc. The following lists the fields of several important database tables. ◆ The fields of the line parameter database table are: line number, line name, setting group number, acquisition card number, card line number, IA input, IB input, IC input, UA input, UB input, UC input, combined command output, skip command output, and low-frequency setting cycle. ◆ The protection setting library table contains the following fields: line number, line name, setting number, current stage I setting, current stage II setting, current stage II time setting, current stage III setting, current stage III time setting, current protection voltage lockout value, reclosing time setting, reclosing voltage detection setting, primary side PT ratio, primary side CT ratio, whether current stage I is engaged, whether current stage II is engaged, whether current stage III is engaged, whether stage I is directional, whether stage II is directional, whether stage III is directional, whether stage I is voltage locked, whether stage II is voltage locked, whether stage III is voltage locked, whether acceleration stage II is accelerated, whether acceleration stage III is accelerated, whether acceleration is voltage locked, and whether the direction is 30° or 45°. ◆ The data acquisition card parameter library table contains the following fields: data acquisition card number, data acquisition card name, Ua input channel number, Ub input channel number, Uc input channel number, UΔ input channel, number of protected lines, and dual-port RAM start address. ◆ The system sets the database table fields to include: substation name, local IP address, server IP address, bus voltage acquisition card number, number of protected lines, underfrequency load shedding frequency deviation setting, frequency deviation interval, underfrequency load shedding delay setting, and underfrequency load shedding slip setting. 5.2 A multi-threaded transaction processing method is adopted. After the protection card sends a trip command to the host via an interrupt request, the host sends a trip signal to the corresponding line through the switch output board to execute the trip. If reclosing is configured, a reclosing thread must be started after the trip to implement the reclosing delay and logical judgment. Since the Windows operating system supports multi-threaded operation, it does not affect the operation of the main monitoring program. If multiple lines reclose simultaneously, it only requires starting several reclosing threads. Since each thread is independent and does not affect others, the started thread will be canceled after the reclosing process is completed. Other processes requiring rapid response in this system also need to be implemented through threads. Therefore, it is necessary to reasonably allocate the priority of each thread according to the importance of the process, so that the process requiring the fastest action receives the fastest response. 6. Implementation of Microcomputer-based Multi-channel Protection on the Protection Card The protection card is used to acquire data from multiple lines, determine sudden change trigger criteria and fault type criteria. When tripping is required, it requests an interrupt from the host computer, which then sends a trip command to the trip output relay via the switch output board. The reclosing logic is implemented by the PC host computer. The following mainly introduces the protection software implementation method and process of the protection card. 6.1 Interrupt Handling Program ◆ A soft timer interrupt is used to implement a 1.66667ms sampling interval timing, which has the highest priority. Three 4-channel synchronous A/D converters are started simultaneously in the interrupt program. The conversion time for 12 channels is only 40μs. After the A/D converter finishes, an interrupt request is sent via fast input HSIO instead of polling, eliminating CPU waiting delay and saving valuable CPU time. ◆ Fast input HSI0 serves as the interrupt source for the completion of the A/D converter conversion. The interrupt handler reads the A/D conversion results of each channel and performs a start-up criterion based on the sudden change in phase current difference of each line. When a fault occurs, the interrupt return jumps to the fault handling program. The flowchart of the interrupt handling program is shown in Figure 3. 6.2 Programming Method of the Fault Handling Program The microcomputer protection algorithm for multi-circuit outgoing lines differs significantly from that for single-circuit lines. It requires the fault handling program to be able to handle the simultaneous faulting of multiple lines. In this program, to improve processing speed, the delay of instantaneous overcurrent protection and overcurrent protection is set according to the number of sampling periods. In the sampling interval timer interrupt handler, the delay counter of the line where the fault is started is automatically incremented by 1. The fault handling program performs a criterion to determine whether the delay has expired. If the delay has not expired, other lines continue to be processed. The fault handling program borrows the concept of processes from real-time operating systems (i.e., time-sharing parallel processing technology). The processing of each faulty line is similar to a process. When a line fault occurs, the processing process of the faulty line is suspended (i.e., a process is started). When the fault is cleared or disappears, the suspension is canceled (i.e., the process ends). In the fault handling process of each suspended fault line, there is a progress variable to record where the fault handling process has progressed. The progress is divided into the following stages: 1) three consecutive over-limits; 2) fault delay; 3) issuing trip order; 4) delay after tripping; 5) return after fault clearing. Different processing is performed in different progress stages. This processing method ensures the speed of protection action when multiple lines fail at the same time. The flowchart of the fault handling procedure is shown in Figure 4. 7 Implementation of underfrequency load reduction [5] When an active power deficit occurs and the system frequency decreases, the corresponding load capacity must be cleared in time so that the frequency of the rest of the system can be quickly restored to near the rated value. Therefore, underfrequency load reduction is an important function of substation automation. The underfrequency load reduction function of this system can be set by the user. The setting round of the line is set in the line parameter library table. The frequency deviation setting and delay of each round are set in the system setting parameter library table. 7.1 Setting Principles for Low-Frequency Load Shedding ◆ The low-frequency setting value for the highest cycle is generally selected as 49.1~49.2Hz. This is mainly because, with a certain amount of spinning reserve, if the lost power capacity is not significant, it may automatically recover to 49.5Hz or higher, and the load should not be cut off. However, when the reserve capacity is mobilized, due to the time lag of the speed control system, the frequency will drop to a certain low value before recovering. The frequency setting value for the highest cycle should be higher than the low value of this process. Because there is a delay from the frequency relay sensing the low frequency to the load shedding, the system frequency is still decreasing before the previous cycle trips the load. Therefore, in addition to a lower frequency starting value, the next cycle must also have a delay of 0.2~0.3s to ensure selectivity. ◆ The frequency setting value difference between each cycle is generally selected as around 0.2Hz. ◆ The automatic load shedding should be arranged according to the order of load importance, with secondary loads shedding first, followed by important loads. ◆ Generally, the load shedding should be arranged in at least 5 rounds. The proportion of load shedding in each round may vary, but even distribution is preferable. For example, if the plan is to shed 50% in total over five rounds, it's best to shed 10% in each round. ◆ It is necessary to arrange special rounds with long delays (e.g., 20s). For example, in practical situations, after the first round of load shedding is set to 49.1Hz, the system frequency may hover between 49.1Hz and the next round's 48.9Hz due to insufficient load shedding capacity. Therefore, when arranging the total load shedding for the next round at 48.9Hz, a portion should be shedding from the previous round's 49.1Hz frequency after a 20-second delay to solve the above problem. This arrangement should be repeated for each round. 7.2 Setting Principles for Low-Frequency Load Shedding Slip Setting: Setting the slip setting to df/dt > 8-10Hz/s can effectively prevent tripping caused by frequency relay malfunctions due to substation power outages or load motor feedback. This is because the frequency drop rate caused by motor feedback is much greater than the frequency drop rate caused by power shortages in the system. When the system frequency decreases, the frequency decreases fastest at the start of the event, i.e., 10, f0=50, and K=0.5. In this case, df/dt│max=2.5~5. If the power deficit is too large, only interlocking to cut off concentrated large loads can be relied upon; the step-by-step action of automatic load reduction based on frequency decrease is no longer possible. 8. Conclusion This system has demonstrated excellent anti-interference capability and stable and reliable operation through dynamic model experiments. It also has advantages such as a user-friendly and intuitive interface, complete functions, and easy configuration. Data acquisition is fast and accurate; a single protection card can easily configure various protection and monitoring combinations. It can protect up to six two-phase connected feeders without directional protection, while meeting the requirements for protection speed. The design objectives have been achieved, expanding the research field of microcomputer protection and automation in substations. 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