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How to enhance power and signal integrity through low-noise and low-ripple design techniques

2026-04-06 04:51:16 · · #1

A common challenge for engineers designing power supplies for noise-sensitive systems in medical applications, test and measurement, and wireless infrastructure that utilize clock, data converters, or amplifiers is improving accuracy and precision while minimizing system noise. Given that different people may have different understandings of the term "noise," I want to clarify that the noise discussed in this article refers to the low-frequency thermal noise generated by resistors and transistors in a circuit. You can generally consider noise in the 10 Hz to 100 kHz bandwidth of a noise spectral density curve (in microvolts per square root of hertz) as integrated output noise (in root mean square millivolts). Power supply noise can degrade analog-to-digital converter performance and cause clock jitter.

Previously, powering clocks, data converters, or amplifiers typically involved a sequence of DC/DC converters (or modules), low-dropout regulators (LDOs) (such as TPS7A94, TPS7A82, TPS7A84, TPS7A52, TPS7A53, or TPS7A54), and ferrite bead filters, as shown in Figure 1. This design minimized power supply noise and ripple and maintained good performance with load currents below approximately 2A. However, as the load increased, power losses in the LDOs led to efficiency and thermal management issues; for example, a post-regulated LDO could add up to 1.5W of power loss in a typical analog front-end application. Is a low-noise, high-efficiency design impossible? Not necessarily.

Replace the LDO with a low-noise step-down converter or module.

One way to prevent power loss is to minimize the voltage drop across the LDO. However, this approach negatively impacts noise performance. Furthermore, higher current LDOs are typically larger, increasing design size and cost. A more efficient approach that ensures low noise without increasing power loss is to replace the LDO in the design with a low-noise DC/DC buck converter or module.

I understand your question: how can a low-noise power supply still be provided even after removing the main noise reduction components? Actually, many LDOs have a low-pass filter at the bandgap reference to minimize noise entering the error amplifier. The low-noise buck converters of the TPS62912 and TPS62913 series, as well as the TPSM82912 and TPSM82913 modules, use a capacitor connected to the noise reduction/soft-start pin, forming a low-pass resistor/capacitor filter with the integrated Rf and the externally connected CNR/SS. Essentially, this structure simulates the performance of the bandgap low-pass filter in an LDO. If the TPS62913 or TPSM82913 still doesn't meet your low-noise requirements, you can use a low-noise LDO with even lower dropout and power consumption (such as the TPS7A94) to still achieve ultra-low noise. Application Brief SBVA099 explains this in more detail.

How to reduce output voltage ripple?

All DC/DC converters generate output voltage ripple at their switching frequency. In precision systems, noise-sensitive analog power rails require ultra-low supply voltage ripple to minimize frequency spurious signals in the spectrum. Supply voltage ripple typically depends on the DC/DC converter's switching frequency, inductance value, output capacitance, equivalent series resistance, and equivalent series inductance. To reduce ripple from these components, engineers often use LDOs and/or small ferrite beads and capacitors to form π-type filters, thereby minimizing load ripple. Low-ripple buck converters such as the TPS62912 and TPS62913, as well as the TPSM82913 module, fully utilize ferrite bead filters by integrating ferrite bead compensation and telesensing feedback. By utilizing the inductance of the ferrite beads and the additional output capacitor, high-frequency components in the output voltage ripple are eliminated, reducing the ripple by approximately 30 dB.

in conclusion

By integrating features that reduce system noise and ripple, low-noise buck converters help engineers achieve low-noise power solutions without the need for LDOs. Of course, different applications require different noise levels, and different output voltages demand different performance characteristics. Therefore, you must choose the appropriate low-noise architecture for your design. If you want to simplify noise-sensitive analog power supply designs, reduce power losses, and shrink the overall design size, consider using a low-noise buck converter.


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