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In what situations can we increase the switching frequency of a flyback power supply?

2026-04-06 04:48:53 · · #1

Question 1: For flyback power supplies, which are most commonly used in low-power applications, why do we often choose 65kHz or 100kHz (or similar frequency ranges) as the switching frequency? What are the limiting factors? Or under what circumstances can we increase or decrease the switching frequency?

Why are switching power supplies often chosen to use a switching frequency in the range of around 65kHz or 100kHz? Some might say it's because IC manufacturers produce ICs in this range, and there are certainly reasons for that. What does the switching frequency of each power supply determine?

We should start thinking about the reasons from this perspective. Some people might say that higher frequencies lead to poor EMC performance, which is generally true, but not always. EMC is related to frequency, but it's not a given. Imagine increasing the switching frequency of our power supply; what's the direct impact? It's increased MOSFET switching losses, because the number of switching operations per unit time increases.

What happens if the frequency decreases? Switching losses decrease, but the energy provided by our energy storage devices per cycle increases, inevitably requiring a transformer with stronger magnetism and a larger energy storage inductor. Choosing a frequency between 65K and 100K is a suitable empirical compromise, and power supplies operate within this rationalized compromise.

If, under special circumstances, the input voltage is relatively low and the switching loss is already very small, and we don't care about this small amount of switching loss, then we can increase the switching frequency to reduce the size of the magnetic components.

How to choose the appropriate switching frequency for an IC? Why are the switching frequencies of mainstream ICs generally within these ranges? What factors influence the switching frequency? This is a general overview, not a digging into the details of different IC frequencies. The goal is to broaden everyone's thinking and encourage consideration of these issues!

What I want to talk about here is the general situation, mainly what the switching frequency is related to, how to choose the appropriate switching frequency, and why the mainstream ICs and their switching frequencies are so many. Note that this is not a certainty, but a general situation, so that beginners can understand the general behavior. Of course, switching power supplies can be used however you want, as long as they are used reasonably.

1. How did you determine that 65 or 100kHz is generally chosen as the switching frequency for a switching power supply? (Based on research of mainstream ICs from major manufacturers, these two are the most common, although some are in this range, and some have adjustable switching frequencies.)

2. How was it discovered during operation that the switching frequency of the power supply was indeed operating at 65kHz or 100kHz? (From a design perspective, this is the range commonly used in power supplies.)

3. Do you have more than two pictures showing the test at 65kHz and 100kHz frequencies? (More than two pictures are meaningless.)

4. Do you know that switching power supplies can operate at 1.5Hz? (You think it's necessary to discuss this? There's nothing wrong with it. You're just nitpicking. Remember, in technical work, you shouldn't nitpick. Then you can talk about why most power supplies don't operate at 1.5Hz. That would be meaningful. Making a 1.5Hz power supply is completely pointless.)

Reminder: As a technical professional, remember not to get bogged down in details. We are not campus researchers; we need to combine theory with practice to create meaningful products!

Question 2: Why do we often design the switching frequency in Zone 2 in LLC? Why not in Zone 1 or Zone 3? What factors are limiting this? Or what would be the consequences if Zone 1 or Zone 3 were chosen as the switching frequency?

The principle of LLC (Limited Circuit) is to utilize the increase in inductive reactance of the inductive load as the switching frequency increases, thereby regulating the output voltage, which is PFM modulation. Furthermore, the turn-on loss (ZVS) of the MOSFET is smaller than the ZCS (Zero-Signal Loss), making region one (capacitive load region) undesirable. Region three, with a switching frequency higher than the resonant frequency, is still an inductive load region. Theoretically, achieving ZVS with the MOSFET shouldn't be a problem, and indeed it is. However, we cannot ignore the turn-off of the secondary-side output diode. That is, when the primary-side MOSFET turns off, the resonant current does not decrease to equal the magnetizing current, failing to achieve soft turn-off of the secondary-side rectifier diode. This is also why region three is generally not chosen.

We cannot simply design based on the experience of our predecessors; we must understand that there is a necessary reason for designing in this way!

Question 3: What happens when our flyback duty cycle is greater than 50%? What are the positive aspects? What are the negative aspects?

What does a flyback transistor's duty cycle greater than 50% mean, and what factors does the duty cycle affect? ​​First, an excessively high duty cycle leads to an increased turns ratio, inevitably increasing the stress on the main MOSFET. Generally, flyback transistors are selected with voltages below 600V or 650V for cost considerations. An excessively high duty cycle simply cannot withstand the load.

Secondly, and importantly, as many people know, slope compensation is necessary to prevent loop oscillation. However, this is conditional; the generation of the right-plane zero point requires operation in CCM mode. If designed in DCM mode, this problem does not exist. This is one of the reasons why low-power circuits are designed in DCM mode. Of course, a sufficiently good loop compensation design can also overcome this problem.

Of course, in special cases, the duty cycle needs to be designed to be greater than 50%. The energy transferred per unit cycle increases, which can reduce the switching frequency and improve efficiency. If the flyback converter is designed to achieve high efficiency, this method can be considered.

Question 4: To achieve a certain efficiency in a flyback power supply, what aspects need to be addressed? Quasi-resonance? Synchronous rectification?

One major disadvantage of flyback transistors is their efficiency. What are some ways to improve efficiency? Reducing losses is essential. The main sources of losses are the switching transistor, the transformer, and the output rectifier diode.

We know that flyback transistors are mostly hard switches using PWM modulation, and switching losses are a major challenge. Fortunately, the emergence of soft switching offers hope. Flyback transistors cannot achieve full resonance like LLC transistors, so they can only develop towards quasi-resonance (resonance during partial time periods). Many such ICs have been developed; our company uses the NCP1207 extensively. It detects the VCC voltage crossing to zero at pin 1 after the MOSFET is turned off and before the next turn-on, then turns on the next cycle after a set time.

How to minimize transformer losses and achieve perfect transformer performance will be discussed later.

Synchronous rectification is typically used when outputting high current. Even with a Schottky diode, the secondary-side rectifier diode still suffers from significant losses. In such cases, a synchronous rectification MOSFET is used instead of a Schottky diode. Some might argue that this is too expensive and suggest using an LLC converter or a forward converter instead. Of course, there's no single best solution, only the most suitable one.

Question 5: How is power conduction formed? What are the conduction paths? What are the commonly used methods? What factors affect the radiation of a power source? How to conduct EMC for high-power systems?

The power conduction measurement method involves receiving high-frequency interference (typically 150K to 30M) from inside the power supply through the input ports L, N, and PE.

To resolve conduction issues, it is essential to determine the pathways through which to reduce the interference received at the port.

As shown in the figure: there are generally two modes: L and N differential mode components, and common mode components through the PE ground loop. Some frequencies have both differential and common modes.

Filtering methods typically involve a two-stage common-mode circuit with a Y capacitor. The choice of inductor and its placement significantly impacts the filtering performance. A low-inductance (U) inductor, preferably nickel-zinc alloy specifically designed for high frequencies, is usually placed near the input ports. It should be wound with two parallel wires to minimize differential-mode components. The output stage typically uses a larger inductance, around 4MHz to 10MHz, but this is based on experience and requires specific pairing with the Y capacitor. The X capacitor, used for differential-mode filtering, also needs to be placed near the input ports, usually between the two common-mode stages. When placing the Y capacitor, the traces need to be thickened during PCB layout; external mounting is not recommended as it will significantly reduce effectiveness. (These techniques only address input filtering network considerations.)

Of course, one can also address the issue at its source. Conduction is a result of radiation coupling into the circuit, so reducing switching radiation can also benefit conduction. Several factors typically affect radiation, including the turn-on speed of MOSFETs, the turn-on and turn-off of rectifier diodes, transformers, and PFC inductors, among others. The design of these circuits requires compromises with other aspects and will not be detailed here.

Some tips and tricks: For high-power EMC, adding shielding usually provides immediate results. There are generally several options for shielding locations:

First: Shielding between the input EMI circuit and the switching transistor. This has a great effect on EMC, and this method is generally very effective for many problems that are ineffective with filters.

Second: Shielding of the primary and secondary windings of the transformer. If there is space, it is best to add shielding when designing the transformer.

Third: The location of the heat sink can serve as a good shield, and proper layout and selection of the heat sink grounding are also very important.

Fourth: Determining the location of the radiation source generally involves several simple methods, though they may not be entirely accurate. These can be used as a reference. If adding a ferrite core to the input line is beneficial for EMC, it's usually the primary-side MOSFET. If adding a ferrite core to the output line is effective for EMC, it's usually the secondary-side output rectifier, especially at high frequencies above 100MHz. Consider adding a capacitor or common-mode inductor to the output.

Of course, there are many other details and techniques, especially regarding layout loops, which will be explained separately in the later section on layout.


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