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Offline Switching Power Supply (SMPS) Design Scheme

2026-04-06 05:57:44 · · #1

Offline switching power supplies (SMPS) are classic products that convert mains power to DC power based on the terminal load. Typically, these power supplies contain two conversion stages, and to achieve higher efficiency, better power switches or different control strategies are required. Furthermore, selecting the most suitable topology based on specific circumstances is also important. This system solution guide will introduce the fundamentals of offline SMPS, as well as a selection of On Semiconductor products and solutions. This is Part One, focusing on system application, system implementation, system description, market information, and trends.

Offline switching power supplies (SMPS) are classic products that convert mains power to DC power based on the terminal load. Typically, these power supplies contain two conversion stages, and to achieve higher efficiency, better power switches or different control strategies are required. Furthermore, selecting the most suitable topology based on specific circumstances is also important. This system solution guide will introduce the fundamentals of offline SMPS, as well as a selection of On Semiconductor products and solutions. This is Part One, focusing on system application, system implementation, system description, market information, and trends.

System Purpose

Offline SMPS has been attracting much attention since the last century, with numerous related studies and widespread applications in all aspects of daily life. Offline SMPS generally refers to a switching power supply with an isolation transformer and powered by the mains, applicable to everything from 65W laptop battery chargers to multi-kilowatt data center server power supplies.

The proliferation of wide-bandgap semiconductor products allows manufacturers to adopt new topologies to optimize efficiency, size, and integration levels based on specific needs. Newly designed controllers also contribute to improved system security, reduced power consumption, and enhanced performance.

To achieve the global goal of "zero carbon," SMPS must meet stricter efficiency standards to minimize energy consumption and carbon emissions. For example, to promote energy conservation and emission reduction, the European Commission's newly released CoC V5 and the US Department of Energy's DoE VI have set clear requirements for power loss and efficiency under full load and light load/no-load conditions.

System Implementation

3kW Totem Pole PFC+LLC PSU Reference Design

Typical offline SMPS

System Description

1. Standard

Currently, there are three main types of standards, including safety standards and radiation standards. The latest revised edition of IEC 62368-1, second edition, falls under the safety standard category, clearly defining concepts such as insulation, isolation, clearance, and creepage distance. IEC 61000-3-2, on the other hand, is an international radiation standard that limits power supply voltage distortion by specifying the maximum harmonic current values ​​from the 2nd to the 40th harmonic. This standard applies to equipment with a rated current not exceeding 16A; equipment with a rated current greater than 16A should comply with IEC 61000-3-12.

To promote energy conservation and emission reduction, relevant regulations and standards have been established worldwide, such as the regulations set by the California Energy Commission, Energy Star certification, and the EU's Energy Related Products (ErP) Directive. The US Department of Energy (DoE) has released a set of grading standards for wall-mounted or desktop external power supplies, with Level VI being the latest and most stringent standard; meanwhile, the European Commission's scientific and knowledge service, the Joint Research Centre, has developed a set of EU Code of Conduct (CoC) for External Power Supply (EPS) devices.

In addition, there is the 80 PLUS® program, which aims to achieve 80% or higher efficiency at 20% to 100% load and a power factor of 0.9 or higher at 100% load. Its highest level (i.e., the “80+ Titanium” standard) requires an efficiency of at least 92% at 20% load and at least 94% at 100% load.

2. Power factor correction

Power Factor Correction (PFC) is a critical component of offline power supplies. Its main tasks are to shape the input current and reduce high-frequency harmonic currents. The former increases the actual power drawn from the mains supply, while the latter reduces losses and costs associated with power distribution, generation, and critical equipment. Total Harmonic Distortion (THD) is an important method for determining the line current quality in a system and is often used as a proxies for power factor. Another significant value of the PFC stage is its ability to provide a stable DC output voltage, which allows for a narrower DC input range for subsequent isolated DC-DC converters, thus optimizing the overall design.

3. DC-DC level

The function of a DC-DC stage is to convert a range of input voltages into the required DC output voltage and current through an isolation transformer and a PWM or resonant converter. A key challenge in DC-DC stages lies in the design of the magnetic components. For example, the skin effect and proximity effect can cause eddy currents in high-frequency transformers, affecting the selection of core materials and leading to core losses and copper losses.

4. Current control mode

It's necessary to review the classic operating modes here, as they influence not only topology selection but also the overall system design. CCM (Continuous On-Mode) offers ultra-low peak and RMS current, making it more suitable for higher power applications. In CCM, inductor current ripple is low, but the MOSFET turns on when the boost diode is on. Therefore, a low trr diode is needed to avoid excessive losses and stress on the MOSFET during turn-on. CrM (Critical On-Mode) is well-suited for low-power applications.

In this mode, the inductor current reaches zero and then begins the next cycle, with the frequency varying depending on the line voltage and load conditions. A major advantage of CrM is that the current loop is inherently stable and does not require slope compensation. Furthermore, since the inductor current drops to zero in each cycle, the diode does not experience reverse recovery losses during turn-off, and performance is not compromised even when using a less expensive boost diode. Similarly, the MOSFET can turn on at low voltages, thus reducing switching losses.

Typically, when the system is under light load, CrM/CCM switches to DCM (discontinuous conduction mode) to ensure a high power factor and suppress EMI caused by a significant increase in frequency near the zero crossing.

FCCrM (Frequency Clamped Critical On-Mode) is a method proposed by ON Semiconductor to limit the switching frequency spread of CrM circuits. When the converter operates under light load and/or near the zero-crossing point of the line voltage, the maximum frequency clamping forces the system to switch to DCM. Without such a circuit, the CrM switching frequency will exceed the clamping limit, leading to increased switching losses. In this case, an additional circuit is needed to compensate for the dead time generated by DCM, ensuring the line current maintains the correct waveform.

1. Wide bandgap semiconductors

Wide bandgap devices are entering mass production, and many companies have subsequently launched (or are about to launch) SiC/GaN-based SMPS (Smart Smart Devices). SiC/GaN materials offer numerous advantages, including excellent reverse recovery performance, outstanding thermal properties, and high operating voltage and temperature, allowing for higher frequencies and smaller PCB sizes in new systems, even eliminating the need for heatsinks or forced cooling. However, high frequencies may introduce potential problems such as radiation and overshoot, necessitating the development of new designs.

2. Integration

This saves PCB space and reduces external passive components, thereby increasing power density and mounting flexibility. For example, GaN HEMTs are a popular choice for low-to-medium power supplies (Pout < 1500W), significantly reducing the size of the final product. When dv/dt can exceed 100V/ns, we need to reduce parasitic inductance. Integrating the GaN HEMT and driver in the same package reduces lead and PCB-induced inductance, resulting in better switching performance.

3. The new topology can improve efficiency.

Totem-pole PFC reduces losses caused by the rectifier bridge, making it a better PFC topology than single boost converters in high-power-density products. Today, LLC converters, with their wider soft-switching range, narrower frequency range across load variations, and lower circulating current, are becoming the preferred DC-DC topology for medium- to high-power applications. Wide-bandgap semiconductors play a crucial role in these new topologies, while intelligent low-power controllers are another important factor in achieving high efficiency.


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