The main reasons for the overheating of MOSFETs with very low internal resistance include the following:
Power loss: When a large current flows through a MOSFET, even with a small internal resistance, significant power loss will occur, leading to heat generation. In switching power supplies, if the MOSFET's turn-off and turn-on speeds are not fast enough, additional power loss will also occur.<sup>12</sup>
Linear operating state: If the MOSFET operates in the linear region rather than the switching region, the conduction time will be too long, which will cause it to operate in the linear region, increase the equivalent DC impedance, increase the voltage drop, and thus increase power loss and heat generation.23.
High switching frequency: In the pursuit of miniaturization, increasing the operating frequency will lead to increased losses on the MOSFET and significant heat generation.23
Inadequate heat dissipation design: If the heat dissipation design is inadequate, even if the current does not exceed the nominal value, it may still cause serious overheating due to poor heat dissipation.
Improper selection: When selecting a MOSFET, improper selection of internal resistance can also lead to increased switching impedance, increased power loss, and thus heat generation.
External factors: External short circuits or open circuits, failure to disconnect the circuit after overcurrent protection trips, excessive load, and excessively high ambient temperature can also cause MOSFETs to overheat.
Source, Drain, and Gate correspond to the three terminals of a field-effect transistor: source (S), drain (D), and gate (G) (Gate breakdown is not discussed here; only drain voltage breakdown is addressed).
1. What are the different types of MOSFET breakdown?
First, let's discuss the test conditions. In all cases, the source, gate, and substrate are grounded. Then, the drain voltage is scanned until the drain current reaches 1uA. Therefore, from the perspective of device structure, there are three leakage paths: Drain to source, Drain to Bulk, and Drain to Gate.
1. Drain -> Source (penetrate and penetrate)
This is mainly because when a reverse bias voltage is applied to the drain, the depletion region of the PN junction of the drain/bulk extends. When the depletion region touches the source, a path is formed between the source and drain without needing to be turned on, hence the name punch-through.
So how do we prevent punch-through? This brings us back to the reverse bias characteristics of the diode. The width of the depletion region is related not only to the voltage but also to the doping concentration on both sides. The higher the concentration, the more it can suppress the extension of the depletion region width. Therefore, there is an anti-punch-through injection (APT) in the flow. Remember that it should be injected with the same type of spec as the well.
Of course, if you actually encounter a situation where WAT's BV is running and it's confirmed that it's coming from the Source side, you might need to check if there's a PolyCD or Spacer width issue, or an LDD_IMP problem.
How do we rule it out? That depends on whether both NMOS and PMOS are running. POLY CD can be verified using the WAT data related to Poly.
For penetration and breakdown, the following characteristics are present:
(1) The breakdown point of the through-breakdown is soft. During the breakdown process, the current gradually increases because the depletion layer expands more widely and generates a larger current.
On the other hand, the large depletion layer expansion makes it easy for the DIBL effect to occur, which causes the source substrate junction to show a gradual increase in current when forward biased.
(2) The soft breakdown point of the punch-through breakdown occurs when the depletion layers of the source and drain are connected. At this time, the carriers at the source end are injected into the depletion layer and accelerated by the electric field in the depletion layer to reach the drain end.
Therefore, the current during punch-through breakdown also has a point of sharp increase. This sharp increase in current is different from the sharp increase in current during avalanche breakdown. At this point, the current is equivalent to the current when the source-substrate PN junction is forward-conducting, while the current during avalanche breakdown is mainly the avalanche current when the PN junction is reverse-conducting. If current limiting is not applied, the current during avalanche breakdown will be larger.
(3) Penetration breakdown generally does not result in destructive breakdown. This is because the field strength of penetration breakdown does not reach that of avalanche breakdown, and therefore does not generate a large number of electron-hole pairs.
(4) Punch-through breakdown generally occurs inside the channel. Punch-through is not easy to occur on the channel surface. This is mainly because the surface concentration is greater than the concentration caused by channel injection. Therefore, NMOS transistors generally have anti-punch-through injection.
(5) Generally, the concentration at the edge of the beak is greater than that in the middle of the channel, so penetration usually occurs in the middle of the channel.
(6) The length of the polycrystalline gate has an impact on punch-through breakdown; as the gate length increases, the breakdown increases. Strictly speaking, it also has an impact on avalanche breakdown, but it is not as significant.
2. Drain → Bulk avalanche penetration
This is simply an avalanche breakdown of the PN junction. Primarily, the reverse-biased drain voltage widens the depletion region of the PN junction, applying a reverse-biased electric field. This causes electrons to accelerate and collide with the crystal lattice, creating new electron-hole pairs. These electrons continue to collide, and the avalanche multiplication continues until breakdown occurs. Therefore, the breakdown current increases almost rapidly, the IV curve rises almost vertically, and it is very easy to burn out. (This is different from source-drain breakdown.)
So how do we improve the junction BV? So we mainly need to start with the characteristics of the PN junction itself. We definitely need to reduce the electric field in the depletion region to prevent the generation of electron-hole pairs by collisions. Lowering the voltage is definitely not enough, so we can only increase the width of the depletion region. Therefore, we need to change the doping profile. This is why the breakdown voltage of an abrupt junction is lower than that of a graded junction.
Of course, besides the doping profile, there's also the doping concentration. The higher the concentration, the narrower the depletion region, and therefore the stronger the electric field, which naturally reduces the breakdown voltage. Furthermore, there's a general rule that the breakdown voltage is usually more significantly affected by the lower concentration side, because that side has a wider depletion region.
The formula is BV=K*(1/Na+1/Nb). It can also be seen from the formula that if the concentrations of Na and Nb differ by a factor of 10, one of them can be almost ignored.
If the actual process reveals that the BV has decreased and it's confirmed that the flow originated from the junction, then you should thoroughly investigate your Source/Drain implant.
3. Drain → Gate broken
This is mainly due to gate oxide breakdown caused by overlap between the drain and gate, which is somewhat similar to GOX breakdown, but more like GOX breakdown in a polyfin. Therefore, it may be more concerned about poly profile and sidewall damage. Of course, another issue with this overlap is GIDL, which also contributes to leakage and reduces BV.
The above describes the three channels of MOSFET breakdown, with the first two being the most common in BV cases.
The above describes breakdown under off-state conditions, that is, when the gate is 0V. However, sometimes when the gate is turned on and the drain voltage is too high, it can also lead to breakdown, which we call on-state breakdown.
This phenomenon is particularly common when the gate voltage is low, or when the transistor is just turned on, and it is almost always an NMOS transistor. Therefore, we usually test BVON transistors at WAT as well.
The above describes the three channels of MOSFET breakdown, with the first two being the most common in BV cases.
The above describes breakdown under off-state conditions, that is, when the gate is 0V. However, sometimes when the gate is turned on and the drain voltage is too high, it can also lead to breakdown, which we call on-state breakdown.
This phenomenon is particularly common when the gate voltage is low, or when the transistor is just turned on, and it is almost always an NMOS transistor. Therefore, we usually test BVON transistors at WAT as well.
2
How to handle severe overheating of a MOSFET under low current?
MOSFETs are indispensable in power supply design and driver circuits. There are many types of MOSFETs and many uses. When used in power supplies or drivers, they are used for their switching function.
Whether it's an N-type or P-type MOSFET, their working principle is essentially the same. The voltage applied to the gate at the input terminal of a MOSFET controls the drain current at the output terminal.
MOSFETs are voltage-controlled devices. They control the characteristics of the device by the voltage applied to the gate. Unlike transistors, which are used as switches, MOSFETs do not have the charge storage effect caused by the base current. Therefore, in switching applications, the switching speed of MOSFETs should be faster than that of transistors.
We often look at the PDF parameters of MOSFETs. MOSFET manufacturers use the RDS(ON) parameter to define the on-resistance. For switching applications, RDS(ON) is also the most important device characteristic.
The datasheet defines RDS(ON) as related to the gate (or drive) voltage VGS and the current flowing through the switch, but for a fully driven gate, RDS(ON) is a relatively static parameter. A MOSFET that is constantly on heats up easily. Additionally, a slowly increasing junction temperature will also lead to an increase in RDS(ON).
MOSFET datasheets specify thermal resistance parameters, which are defined as the heat dissipation capability of the semiconductor junction in the MOSFET package. The simplest definition of RθJC is the thermal resistance from the junction to the case.
1. Reasons for MOSFET heating up under low current:
1) Circuit design problem: The MOSFET is designed to operate in a linear state instead of a switching state, which is one of the reasons why the MOSFET heats up.
If an N-MOS transistor is used as a switch, the gate voltage needs to be several volts higher than the power supply voltage to fully conduct; the opposite is true for a P-MOS transistor. Incomplete conduction and excessive voltage drop result in power consumption. A larger equivalent DC impedance leads to a larger voltage drop, thus increasing U*I, and power loss translates to heat generation. This is a highly taboo mistake in circuit design.
2) Too high frequency: This is mainly because sometimes the pursuit of size leads to an increase in frequency, which increases the loss on the MOSFET and thus the heat generation.
3) Inadequate heat dissipation design: The current is too high. The nominal current value of the MOSFET generally requires good heat dissipation to be reached. Therefore, even if the current ID is less than the maximum current, it may still generate serious heat and require sufficient auxiliary heat sinks.
4) Incorrect selection of MOSFET: The power assessment was incorrect, and the internal resistance of the MOSFET was not fully considered, resulting in an increase in switching impedance.
2. How to solve the problem of severe overheating of MOSFETs under low current:
0. Design a good heat dissipation system for the MOSFET and add enough auxiliary heat sinks.
Apply thermal adhesive.
3
Why can a MOSFET prevent reverse power connection?
Reverse power connection can damage a circuit, but it is sometimes unavoidable. Therefore, we need to add a protection circuit to prevent damage even if the power supply is reversed.
This can usually be solved by connecting a diode in series with the positive terminal of the power supply. However, since diodes have a voltage drop, they can cause unnecessary losses to the circuit, especially in battery-powered applications. The battery voltage is already 3.7V, and if you use a diode to drop it by 0.6V, the battery life will be greatly reduced.
The advantage of reverse polarity protection for MOSFETs is their small voltage drop, which is almost negligible. Modern MOSFETs can achieve an internal resistance of a few milliohms, say 6.5 milliohms, and with a current of 1A (which is already quite large), the voltage drop across it is only 6.5 millivolts.
