In the low-power motor drive sector for consumer electronics and general industrial applications, transfer-molded smart power modules are a current trend. Fairchild Semiconductor's Smart Power Modules (SPMs) cover a power range from 0.05 to 7 kW, offering compactness, functionality, reliability, and cost-effectiveness. By using transfer-molded packaging with a copper direct bonding (DBC) substrate, power density is increased, and various circuit topologies, such as three-phase inverters, SRM drivers, and power factor correction, can be implemented in a single package. This article will introduce the cutting-edge technologies implemented in SPMs from the perspectives of devices, packaging, and system configuration. For companies serving the home appliance and low-power industrial markets, the focus is increasingly shifting from vertical integration of the manufacturing process to the development of core competencies, such as brand development, customer service, and logistics. Integrating discrete power semiconductor devices and drivers into a single package allows these companies to reduce the time and effort spent on design, ensuring their electrical products have reliable power electronics. This integration enables these companies to shorten time-to-market and bring innovative technologies to end users more quickly. One driving force behind the demand for innovation is long-term energy-saving initiatives that compel companies to adopt inverter drive technologies. Different types of appliances use different drive solutions, so the power stage requirements of different types of systems vary, i.e., circuit topology and power levels. This article will present several examples of successfully integrating different devices into a single module to meet these diverse needs. Since the initial development of SPM in 1999, Fairchild Semiconductor has successfully developed multiple SPM series, covering consumer appliances from 50W to 7kW and low-power general industrial applications. This article will detail the SPM design concept and its semiconductor implementation methods (power devices and control ICs), packaging, and system technologies. Power Devices Due to advancements in IGBT technology, the SPM series has undergone continuous upgrades since its initial appearance in the industrial market. With the introduction of submicron design rules, not only has the chip size decreased at a faster pace, but the current density has also increased significantly. The latest generation of IGBT chips achieves a better performance balance between turn-off losses and on-state voltage drop, while ensuring sufficient SOA. Figure 1 illustrates the improvements in IGBT technology. Clearly, the V5 IGBT offers excellent device performance, enabling increased power capacity in a smaller package. Low-power operation often requires faster switching speeds, leading to increased recovery current and higher dv/dt, resulting in greater electromagnetic interference (EMI), high surge voltage, and motor leakage current. During the development of the SPM series, EMI issues were considered, and the gate drive design was optimized, sacrificing high switching speed to control the switching speed of the integrated IGBT. It is precisely because of the IGBT's low on-state voltage drop that overall power consumption remains constant while achieving low EMI characteristics. Figure 2 shows the typical dv/dt characteristics of the SPM. At its rated current, the turn-on and turn-off dv/dt are below 5kV/μs. Furthermore, to achieve better ESD protection, a multi-silicon back-to-back diode with sufficient clamping voltage is used between the gate and emitter. An ESD level of HBM 2.5kV and MM 300V can be achieved within a chip area of ​​2,350 × 2,350 square micrometers. Using integrated protection diodes, all SPM products meet industry-standard ESD levels. Due to cost-effectiveness, HVIC and LVIC driver ICs are designed with minimal essential functions, making them particularly suitable for inverter drives in consumer electronics. Design considerations include: reducing chip size through fine process technology; a valid "high-level" interface directly driven by a 3V-fed microcontroller; low power consumption; improved noise immunity; and better stability against temperature variations. One feature of HVIC is its built-in high-level offset function, as shown in Figure 3, which allows direct conversion of the PWM input from the microcontroller to the high-side power device. Furthermore, using an external charging reverse capacitor, a single control power supply can drive the SPM. On the other hand, HVIC is sensitive to external noise because its signal is converted via pulse signals and SR latches. For this pulse-driven HVIC, high dv/dt switching to drive IGBTs is the most dangerous type of switch. Assuming the parasitic capacitance of the LDMOS viewed from the drain is CM, and the conduction dv/dt of the high-side IGBT is dVS/dt, CM must be charged with a large current (CM * dVS/dt) to ensure the LDMOS drain voltage follows the rapidly changing VB voltage, which is coupled to VS through the bootstrap capacitor CBS. This large charging current causes excessive voltage drops across R1 and R2, potentially triggering the SR latch. To overcome noise sensitivity, a noise canceller with a unique topology was developed, as shown in Figure 3. The V/I converter converts the level shifter output into current information. For common-mode noise with high dv/dt, the V/I converter will produce the same output. However, for normal operation, the V/I converter outputs are different because only one of the two LDMOS operates in the normal level shifter state. This makes it easy to determine whether the V/I converter output is due to noise. Once the noise canceller detects common-mode noise intrusion, it absorbs the current output of the V/I converter. Then, the V/I converter reconstructs the voltage signal, which originates from the current output of the V/I converter and oscillates between the VB and VS power rails. Finally, the amplified signal is sent to the SR latch. Another advantage of V/I and I/V conversion is that it allows the negative VS voltage to no longer be dominated by the circuit's threshold voltage. Due to its unique topology, Fairchild Semiconductor's HVIC exhibits excellent noise immunity, tolerating high dv/dt noise up to 50V/ns, and extending the negative voltage operating range to VS=-10V at around VBS=15V. The LVIC is responsible for all protection functions and its feedback to the microcontroller. Its protection circuitry detects the control supply voltage, LVIC temperature, and IGBT collector current with an external parallel resistor, and interrupts IGBT operation in error states. The relevant protection should be unaffected by temperature and supply voltage. For example, the detection levels for overcurrent protection in the LVIC are given in Table 1. The error signal is used to notify the system controller whether the protection function has been activated. The error signal output is configured as an open collector, active low. It is typically pulled up to 3.3V to 15V via a pull-up resistor. When an error occurs, the error line is pulled low, interrupting all gates of the low-side IGBT. If the error is caused by overcurrent, a pulse appears at the output, followed by automatic reset. The preferred low-signal duration depends on the application. For example, a few milliseconds are preferred for home appliances, but one to two times the IGBT switching frequency is preferred in industrial applications. SPM's LVIC provides external capacitors and sets this duration according to various requirements. Bootstrap Diodes Beyond the basic three-phase inverter topology, further integration is one of the challenges facing semiconductor companies. The constraint is not a technical issue, but rather cost and package size. From this perspective, bootstrap diodes seem to be a suitable device for integration. In fact, several products with built-in bootstrap diodes have appeared on the market, but from a technical point of view, they differ slightly. One of them uses the high-voltage junction termination region on the HVIC as the bootstrap diode. Its application is limited to low-power applications with ratings below 100W because this approach has a large forward voltage drop and poor dynamic characteristics. At power levels around 400W, discrete FRDs are used as bootstrap diodes. However, due to their limited package size and lack of a series resistor (RBS), special handling is required for high charging currents, especially during the initial charging phase. In applications above 400W, the most common approach is to combine discrete FRDs with discrete resistors. The only drawback of this method is its larger footprint and increased cost. In the development of SPMs, a newly designed bootstrap diode was used, designed to reduce chip size and achieve a moderate forward voltage drop, effectively providing the equivalent of a 20Ω series resistor. As shown in Figure 4, its voltage drop characteristics are equivalent to a series resistor and a standard FRD. Leveraging the advantages of this special bootstrap diode, greater integration can be achieved while maintaining the lowest possible cost. Packaging The main factors driving the development of SPM packages are improving cost-effectiveness while enhancing package reliability in areas such as thermal cycling and power cycling. Therefore, conversion packaging technologies previously used for ICs and LSI products are being applied to power modules. Compared to conventional power modules with plastic or epoxy resin housings, SPMs have a relatively simple structure: the power chip and IC are mounted on a copper lead frame, the substrate material is connected to the frame, and finally, they are molded in epoxy resin. Heat dissipation is a critical issue in package design, as it determines the module's power capacity limitations and involves a significant trade-off with isolation characteristics. The SPM series of convertible packages utilizes several isolation substrates depending on the power rating and application, as shown in Table 2. Leveraging the advantages of existing deformable substrates, power ratings from 600V 3A to 30A can be achieved in the Mini-DIP SPM package while maintaining competitive PCB pin layout and price, as shown in Figure 5. In addition to higher reliability and thermal performance, the flexibility of the DBC (Directly Connected Copper) substrate is another advantage. This allows for derivative products for various applications, such as power factor correction and switched reluctance motors, where only the DBC needs to be changed while other package elements remain unchanged. Several technical challenges remain to be addressed for the mass production of DBCs. This includes developing multi-chip mounting and interconnection technologies for the DBC substrate and leadframe, employing screen printing, multi-chip mounting, conveyor reflow soldering, and flux cleaning processes. Near-zero solder voids were achieved through reflow soldering temperature profile adjustments, increasing the temperature ramp between melting zones, and optimizing solder and screen printing mask design. Thermal warpage of the package was adjusted using simulation and experimental methods to optimize the copper layer thickness of the DBC substrate. Conclusion Constrained by cost factors, the integrated technologies required for SPM design include power devices, driver ICs, packaging, and system optimization. Assembly and testing are also crucial for actual mass production. Currently, SPM positions itself as the most powerful low-power motor drive inverter solution, and its development is expected to accelerate.