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Research on "soft peripherals" in embedded systems

2026-04-06 07:23:13 · · #1
With the continuous improvement of CPU performance, processing speed, and computing power, software peripherals have gradually emerged in the development of many embedded systems. Software peripherals refer to devices that simulate the functions of the CPU's peripherals through software programming, truly achieving the goal of replacing hardware with software. The emergence of software peripherals has brought great flexibility to product development, not only making the system smaller but also making system upgrades and replacements more convenient, thus truly realizing a System-on-a-Chip (SoC). I. Introduction It should be said that software peripherals are not a new idea. Since the invention of computers, electronic system designers have been trying to replace as many actual circuits as possible with software programming, embedding peripherals into the system in this way. However, due to the limitations of CPU speed and computing power, as well as the immaturity of memory technology, the development of software peripherals has been constrained. In recent years, with the development of electronic technology, more and more processor manufacturers have increased support for software peripherals in their processor designs. For example, ARM claims that its 32-bit and 64-bit RISC processors can now implement more and more powerful functions in software, with richer instruction sets, and even many DSP functions can now be implemented on the CPU. Motorola has developed a modem based on the SM56PCI interface, implemented entirely in software. This indicates that circuit design has entered a new era. Currently, there are two main methods for embedding peripherals into electronic systems. Method I uses a standard microprocessor plus an auxiliary chip, which can be a programmable logic chip such as an FPGA or CPLD. Method II uses a basic CPU core plus additional logic units, which can be implemented on a high-density programmable logic chip. The CPU core is often a software module provided by FPGA manufacturers such as Altera and Xilinx. Both methods require developers to be familiar with hardware description languages. However, in practical applications, the use of CPU cores and various IP cores often requires licensing, and programmable logic chips are large and expensive, making them inconvenient for the development of portable devices. Software peripheral design typically uses a standard microprocessor. Under the conditions of system stability and load tolerance, the design uses as many configurable software modules as possible to implement the function of a specific peripheral. These modules can be configured, upgraded, and reconfigured to complete specific functions. It should be noted that not all peripheral functions can be fully implemented in software. The purpose of this design method is to "replace hardware with software" as much as possible within the limits of the system, so as to achieve the best performance ratio with the least amount of hardware overhead. II. System Requirements The following is a structural diagram of an embedded system with software peripherals. The following are the requirements for the embedded system: (1) High-performance CPU core. Software peripherals must be supported by a high-performance CPU core. Only by using a high-performance CPU core can the system frequency be increased, data can be transferred between the software peripherals and the CPU at high speed, and the software peripherals can run at high speed without having much impact on the overall system operation. It is recommended to use a CPU with a pipelined RISC core of 32 bits or more. (2) Fast interrupt response. Software peripherals all use interrupts to make service requests to the CPU. A register set can be added between the on-chip memory and the internal bus to reduce the interrupt response time of the system. (3) Additional hardware modules. As mentioned above, some system characteristics cannot be implemented in software, such as timers and interrupt controllers. In addition, in signal processing, if AD and DA conversion is implemented in software, the system overhead is too large, so it is better to implement it in hardware. (4) Fast and sufficient memory and high-performance computing units. III. Algorithm Design of Soft Peripherals Since soft peripherals require strong real-time performance and sometimes need to run in parallel with other applications, they can be considered as tasks waiting for service during the design process. Coordinating and arranging these tasks is very important. Based on the determinism of the tasks, the process scheduling strategy of the real-time system can be divided into two categories: one is static, mainly responsible for tasks whose occurrence time is known in advance; tasks that need to be completed on schedule; and tasks that need to occur at fixed times. For this type of scheduling strategy, the Round-robin algorithm or interval algorithm can be used (see 3). The other type is dynamic process scheduling strategy, responsible for tasks whose occurrence time cannot be predicted; and tasks whose execution cycle is unknown. These are some temporary tasks, such as tasks containing conditional loops (the condition is unknown when it will be met). The above two strategies are suitable for different situations. In a complex system, there are often several soft peripherals that need to run in parallel. Process scheduling is very important for task synchronization and system optimization. In addition, for the portability and simplicity of the design, modular and hierarchical design should be carried out. Complex soft peripherals can be regarded as composed of several simple modules with hierarchical structure. IV. Performance Analysis A block diagram of an embedded system is shown below. This system uses a Motorola MCF5104 CPU and has three software peripherals: UART, LCD, and keyboard controller. We will now analyze the performance of the software peripherals, taking the UART as an example, in terms of operating speed and energy consumption. The UART implementation contains 16 assembly instructions, each requiring one clock cycle (i.e., CPI = 1), and there is no parity check function. By changing the CPU clock frequency (ranging from 30 to 100), we calculate the ratio of execution time to CPU time to analyze the CPU load of the UART software peripheral at different baud rates. The calculation process is as follows: Assume the time for the CPU to send and receive one byte is t. The CPU utilization rate of the UART software peripheral is T, then t = number of instructions × CPI + interrupt response cycle × CPU clock frequency - 1. T = t × baud rate. The results are shown in Table 1. The statistics in the table above are based on the assumption that the UART operates in full-duplex (FD) mode without error detection. However, the system operates in half-duplex (HD) mode most of the time, where the CPU usage of the UART decreases by 25%. If parity checking is added, the CPU usage of this soft peripheral increases by 11.45% in FD mode and by 7.60% in HD mode. Table 1 shows that the higher the CPU frequency, the less burden the soft peripheral places on the system. Furthermore, the system burden increases with the increase of the UART baud rate. It is recommended that the CPU usage of the soft peripheral should not exceed 20% of the CPU time. Experiments have shown that the system can tolerate a CPU usage of less than 20% for the soft peripheral. Next, we analyze the power consumption of this soft peripheral. From the CPU current consumption curves under different conditions with or without the UART soft peripheral connected, we can see that: 1. The power consumption of the UART soft peripheral increases with the baud rate. 2. The power consumption of the UART soft peripheral increases with the CPU frequency. 3. When the baud rate is less than 70Kbits, the power consumption of UART software peripherals is lower than that of hardware peripherals. In this case, using software peripherals can reduce power consumption, making them suitable for applications with relatively small data volumes (such as voice communication). For applications requiring extremely high system transmission rates (such as video streaming), hardware implementation is more appropriate. V. Conclusion This paper systematically introduces the design philosophy of software peripherals and analyzes some of their performance indicators using a software peripheral as an example. Software peripherals have many advantages: such as convenient debugging, strong system portability, low power consumption, and low cost. They are well-suited for applications requiring portability and low power consumption. Although they also have some disadvantages, such as slower speed and poor parallelism, these will be improved to some extent with the development of CPU-related technologies and the improvement of algorithms. Designers need to consider trade-offs between hardware and software design. After all, the emergence of software peripherals provides embedded system design with a more flexible design scheme, giving designers more choices and a wider design space.
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