Power requirements and challenges of integrated circuits
Analog integrated circuits such as amplifiers and converters often have at least two or more power supply pins. For single-supply devices, one pin is typically connected to ground. Mixed-signal devices like ADCs and DACs may have analog and digital power supply voltages as well as I/O voltages. Digital ICs such as FPGAs may also have multiple power supply voltages, such as core voltage, memory voltage, and I/O voltages. IC datasheets specify the permissible range for each power supply in detail, including recommended operating ranges and maximum absolute values. These limits must be strictly followed to ensure proper IC operation and prevent damage.
However, in reality, even small variations in power supply voltage caused by noise or power ripple, even within the recommended operating range, can degrade device performance. Take amplifiers as an example: small power supply changes can trigger minute fluctuations in both input and output voltages. An amplifier's sensitivity to power supply voltage changes is typically quantified by the Power Supply Rejection Ratio (PSRR), defined as the ratio of the power supply voltage change to the output voltage change. The PSR of a typical high-performance amplifier (such as the OP1177) decreases with frequency by approximately 6 dB/8 octaves (20 dB/10 octaves). While the PSRR can reach 120 dB at DC, it drops rapidly at higher frequencies, where excessive unwanted energy on the power lines couples directly to the output. If the amplifier drives a load and there is unwanted impedance on the power rails, the load current modulates the power rails, increasing noise and distortion in the AC signal. For data converters and other mixed-signal ICs, although the datasheet may not provide the actual PSRR, their performance will still be degraded by power supply noise. Power supply noise can also affect digital circuits in a variety of ways, such as reducing logic level noise margins and causing timing errors due to clock jitter.
Working principle of power decoupling
In a typical 4-layer PCB design, there are usually ground, power, top, and bottom signal layers. The ground pins of surface-mount ICs are directly connected to the ground plane via vias on the pins to minimize unwanted impedance in the ground connection. Power rails are typically located on the power plane and are routed to the IC's various power pins. The current generated within the IC (denoted as IT) flowing through the trace impedance Z causes a change in the power supply voltage VS, which, depending on the IC's PSR, can lead to various performance degradation issues.
By using the shortest possible connection, directly connecting a suitable type of local decoupling capacitor between the power supply pin and the ground plane, sensitivity to power noise and ripple can be minimized. The decoupling capacitor acts as a charge reservoir for transient currents, shunting them directly to ground and thus maintaining a constant supply voltage on the IC. Although the loop current path passes through the ground plane, the low impedance of the ground plane generally prevents the generation of significant error voltages.
High-frequency decoupling capacitors must be placed as close to the chip as possible; otherwise, the inductance of the connection traces will negatively impact the effectiveness of decoupling. For example, in the configuration on the left side of Figure 3, the power pins and ground connections are very short, which is a relatively effective decoupling method; while on the right side of Figure 3, the additional inductance and resistance within the PCB traces will reduce the effectiveness of the decoupling scheme, and the added closed loops may cause interference problems.
Selection and Layout of Decoupling Capacitors
Types and characteristics of decoupling capacitors
Low-frequency noise decoupling typically uses electrolytic capacitors (typically 1μF to 100μF) as a charge reservoir for low-frequency transient currents. Connecting low-inductance surface-mount ceramic capacitors (typically 0.01μF to 0.1μF) directly to the IC power pins can maximally suppress high-frequency power supply noise. For all decoupling capacitors to function effectively, they must be directly connected to a low-inductance ground plane, and this connection requires short traces or vias to minimize additional series inductance.
Different types of capacitors have different characteristics. Ceramic capacitors have low equivalent series resistance (ESR) and equivalent series inductance (ESL), and are relatively inexpensive, making them commonly used decoupling capacitors. Tantalum capacitors have moderate ESR and ESL, but a higher capacitance-to-size ratio, and are often used as higher-value bypass capacitors to compensate for low-frequency variations on power lines. It should be noted that for both ceramic and tantalum capacitors, a larger package usually means a higher ESL.
Self-resonant frequency of decoupling capacitor
Practical decoupling capacitors are not ideal components; their impedance characteristics change with frequency. Due to the presence of ESL (Electrostatic Displacement), the capacitor's impedance begins to rise with frequency at a certain point; this frequency is called the self-resonant frequency. Before the self-resonant frequency, the capacitor is capacitive and effectively decouples; above the self-resonant frequency, the capacitor becomes inductive, and its decoupling effect decreases. For example, a 0.1μF ceramic capacitor in a 0603 package has an ESL of 850pH and an ESR of 50mΩ, and its impedance characteristics differ at different frequencies. A 1μF tantalum capacitor has an ESL of 2200pH and an ESR of 1.5Ω. Due to its higher capacitance, its impedance is initially lower than that of the ceramic capacitor, but the higher ESR and ESL cause its impedance to flatten out around 100kHz, and it is higher than the impedance of the ceramic capacitor between 1MHz and 10MHz, reaching 10 times higher around 10MHz. Therefore, if the noise frequency in the circuit is around 10MHz, a 0.1μF ceramic capacitor is more effective at decoupling than a 1μF tantalum capacitor. To bypass higher frequency noise, a capacitor with lower ESL, i.e., a smaller package, should be selected.
Decoupling capacitor layout principles
When placing decoupling capacitors, the principle of minimizing resistance and inductance should be followed. Decoupling capacitors should be placed as close as possible to the IC's power supply pins to shorten the current path and reduce the inductive effect that hinders performance at high frequencies. In circuits with multiple capacitors for decoupling, especially for circuits with extremely stringent power supply stability requirements, such as GSM power supplies, multiple capacitors of different capacitances and types are needed. Smaller capacitors should be placed as close as possible to the GSM power supply pin. For example, C24 (8.2pF) is closest to the GSM pin, C19 (100nF) is further away, and the furthest is the largest 330uf tantalum capacitor. Furthermore, the way decoupling capacitors are connected to ground vias also affects the decoupling effect; a compromise must be made considering various factors.
Other decoupling components and methods
Ferrite beads (insulating ceramics made from oxides or other compounds of nickel, zinc, manganese) can also be used for decoupling in power supply filters. At low frequencies (<100kHz), ferrites are inductive and useful for low-pass LC decoupling filters; above 100kHz, ferrites are resistive (low Q). Ferrite impedance is related to factors such as material, operating frequency range, DC bias current, number of turns, size, shape, and temperature. Ferrite beads are not necessary in all cases, but they enhance high-frequency noise isolation and decoupling. However, when operational amplifiers drive high output currents, it may be necessary to verify that the beads do not saturate, as ferrites become nonlinear and lose their filtering characteristics when saturated.
Summarize
Maintaining low impedance power supply to integrated circuits (ICs) through power decoupling is crucial for IC performance. Properly selecting the type, capacitance, and package of decoupling capacitors, and strategically placing them, combined with other decoupling components and methods, can effectively reduce power supply noise and ripple, providing a stable, low-impedance power input to the IC and ensuring the stable and reliable operation of the IC and the entire electronic system. In actual circuit design and PCB layout, relevant principles and IC datasheet recommendations should be strictly followed to achieve optimal power decoupling.
