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One article to understand how to minimize the radiation of Ćuk voltage regulators

2026-04-06 01:57:30 · · #1

The radiation from Ćuk voltage regulators mainly originates from the electromagnetic interference generated by their switching current. Optimizing layout and component selection are key to reducing radiation. The specific methods are as follows:

Optimize board layout

Shorten the thermal loop: Place the freewheeling diode D, coupling capacitor C, and switch S1 as close as possible to each other, and use IC pin arrangements (such as LT8330) to achieve a compact connection, thereby reducing the area and length of the thermal loop.

Reduce parasitic capacitance: By optimizing the inductor layout in the power supply path, parasitic capacitance generated by fast switching currents can be prevented, further reducing interference.

Component selection

IC Selection: Prioritize ADI series ICs with negative power supply voltage feedback pins (such as the LT8330). These ICs support negative power supply voltage handling, reducing noise in the feedback loop.

Inductor Design: The inductors used at both the input and output terminals need to balance cost and space constraints, while ensuring that the inductance value matches the circuit to avoid introducing more noise due to excessive inductance.

Practical Applications

Case Study: ADI's LT8330 regulator performs exceptionally well in the Ćuk topology. Its FBX pin supports negative supply voltage handling, effectively reducing radiated interference.

The above measures can significantly reduce the electromagnetic radiation of Ćuk voltage regulators, making them suitable for applications requiring low noise, such as medical equipment and precision instruments.

The Ćuk topology is well-suited for generating negative output voltages from positive supply voltages. Many systems require negative voltages to efficiently read signals from certain sensors. This may necessitate a signal chain, such as +5 V and –5 V, or even +15 V and –15 V. Negative voltages are also used for the safe switching of certain switching elements, such as silicon carbide (SiC).

The Ćuk topology is also known as the 2L antiphase topology because it requires two inductors in the power path. Figure 1 shows the circuit diagram of the Ćuk topology.

When selecting a suitable switching regulator IC, it is crucial to ensure that there is a feedback pin for negative voltages. Analog Devices (ADI) offers a wide range of suitable single-chip switching regulator ICs with integrated switches, as well as controller ICs with external switching transistors.

Most importantly, the two inductors required represent cost and space considerations. However, these two components also introduce inductance into the power paths on both the input and output sides. This helps prevent fast switching currents at the input and output. Therefore, the Ćuk topology is generally considered a particularly low-noise topology. Of course, like other switching regulators, the Ćuk topology has switching currents. These are shown as hot loops in blue in Figure 1. The term hot loop refers to a set of traces with a fast di/dt transition. To minimize interference from switching currents, the parasitic inductance and the resulting loop's spatial extent must be designed to be as small as possible.

Therefore, in the optimal board layout for the Ćuk converter, the freewheeling diode D, coupling capacitor C, and switch S1 must be very close together. Using appropriate IC pinouts (such as the LT8330), a compact arrangement of these lines is not a problem. Figure 2 shows the power path area for the switching current (hot loop) in a concrete slab layout.

The critical loop consists of the external diode D, coupling capacitor C, and the internal connection between the GND and SW pins within the LT8330 switching regulator IC. The thermal loop is designed to be as small and compact as possible.

Figure 3 shows a circuit example using the LT8330, suitable for use as a regulator in a Ćuk topology. An important feature is the FBX pin. It is a special type of FB pin that can handle both negative and positive voltages required in a Ćuk topology. If the LT8330 is used in a boost or SEPIC topology, a positive feedback pin polarity is required.

The inductance on both the input and output sides of a voltage regulator affects its conducted emissions. An optimized board layout with a very compact thermal loop results in a very low-noise solution. These characteristics make Ćuk voltage regulators ideal for generating low-noise negative voltages.

EMI Challenges and Design Considerations: Addressing the EMI issues of buck regulators presents a dual challenge: ensuring both high efficiency and compactness while meeting stringent electromagnetic interference (EMI) standards set by organizations such as the International Special Committee on Radio Interference (CISPR). Component selection becomes a central aspect of the design process, as different component choices often require trade-offs based on design objectives. Although buck regulators are renowned for their high efficiency and excellent thermal performance, they are not incapable of mitigating EMI. In fact, by taking appropriate measures, we can significantly reduce the EMI generated by these regulators.

We must select appropriate components to meet stringent EMI standards while ensuring efficiency, so as to reduce electromagnetic interference generated by the voltage regulator while meeting design goals.

In designs with stringent EMI requirements, board layout becomes a critical factor. To ensure both functionality and EMI standards are met, some general rules must be followed. First, input capacitors and bootstrap capacitors should be placed as close as possible to the VIN and GND pins of integrated circuits to reduce the loop area for high transient currents (di/dt). Second, the surface area of ​​nodes with high transient voltages (dv/dt) should be minimized by optimizing the layout of switching nodes.

Furthermore, minimizing the area of ​​high transient current loops is crucial in the design of switching regulators. For buck regulators, their operating principle involves turning switching devices on and off to convert DC voltage. During this process, MOSFET current is generated on the high-voltage side, forming a loop to ground, which requires special consideration from an EMI perspective.

Optimization of the input capacitor and area control of high transient voltage nodes are key, while the loop design of the high-voltage side MOSFET current requires special attention to EMI factors.


02 Specific Design Strategies

Integrated high-frequency input capacitor

When a MOSFET performs rapid turn-on and turn-off operations, a sharp and discontinuous current is generated by the input capacitor. To minimize the input current loop area, high-frequency input capacitors are integrated into the package, such as TI's 3-A LMQ66430-Q1 and 6-A LMQ61460-Q1 36V buck regulators. This not only reduces the input current loop area but also lowers the parasitic inductance at the input, thereby reducing electromagnetic energy output.

Integrating a high-frequency input capacitor within the package helps reduce the current loop area and parasitic inductance, thereby reducing the output of electromagnetic energy.

▍ Bootstrap Capacitor Loop Management

The bootstrap capacitor loop is also one of the high transient current loops that requires attention. During the switching device's turn-on period, the bootstrap capacitor is responsible for driving the gate of the high-side MOSFET. During the turn-off period, the internal circuitry recharges the capacitor. Since the source of the high-side MOSFET is connected to the switching node rather than GND, connecting the bootstrap capacitor to the MOSFET's source pin ensures that the gate-source voltage (VGS) is high enough to turn on the MOSFET.

In most buck regulator designs, a switching node area needs to be reserved on the circuit board to connect the bootstrap capacitor, but this may conflict with the goal of reducing the switching node size to lower EMI. However, devices like the LMQ66430-Q1, which integrate the bootstrap capacitor within the package, not only follow the two design rules mentioned above but also reduce reliance on external components.

In-package bootstrap capacitors can reduce the need for external components and enable efficient gate-source voltage management, helping to meet both EMI and functional requirements.

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