1. Determine the copper foil width based on current requirements to ensure current carrying capacity.
One of the core functions of copper traces is to transmit current, and their width directly determines their current-carrying capacity. The current differences between different circuits in a switching power supply are significant. For example, the current in input/output circuits and power switching circuits is typically higher, while the current in control circuits is lower. Therefore, the copper trace width must be designed appropriately based on the actual current requirements.
From a design standard perspective, assuming a standard PCB board material (such as FR-4) and a copper thickness of 1 oz (approximately 35 μm), and an ambient temperature not exceeding 30°C, each 1 mm wide copper strip can carry approximately 1 A of current. However, in practical designs, redundancy must be considered to prevent the copper strip from overheating and aging due to prolonged full-load operation. For example, when the circuit current is 3 A, the copper strip width should be designed to be at least 3.5-4 mm; if the current reaches 5 A or higher, the copper strip width needs to be further increased, or a "multiple copper strips in parallel" approach should be used to enhance the current-carrying capacity. Simultaneously, the impact of copper strip length on current carrying capacity must be considered—with the same width, the longer the copper strip, the greater the resistance and the lower the current-carrying capacity. For high-current, long-distance traces (e.g., exceeding 10 cm), the width should be appropriately increased to compensate for the resistance loss caused by the length.
Furthermore, in via design, if copper traces need to connect different layers through vias, the number and specifications of the vias must match the current carrying capacity of the copper. The current carrying capacity of a single via (0.3mm diameter, 1mm pad) is approximately 0.5-1A. If the copper trace carries 2A of current, at least 2-3 parallel vias need to be designed, and the via spacing should be greater than twice the diameter to avoid deviations during drilling.
II. Optimize heat dissipation design to avoid localized overheating.
Switching power supplies generate a significant amount of heat during operation, especially in the copper traces near power devices (such as MOSFETs and rectifier bridges). Poor heat dissipation can lead to localized temperature increases, affecting device lifespan and potentially causing thermal runaway. Therefore, copper trace routing must consider heat dissipation requirements, and efficient heat dissipation can be improved through reasonable layout and structural design.
First, the copper foil around power devices should be as wide and thick as possible. For example, the source-drain connection of a MOSFET can be designed as a 5-10mm wide copper foil, with heat dissipation vias (0.4-0.6mm in diameter) added to conduct heat to the other side of the PCB, forming "double-sided heat dissipation." For devices that generate particularly high amounts of heat, a "heat dissipation copper plating" area can be designed on the copper foil, i.e., a large area of copper foil is laid around the device, and the copper foil is directly connected to the device pins to reduce thermal resistance. It is important to note that the heat dissipation copper plating must be properly connected to the ground or power plane to avoid forming floating copper foil—floating copper foil not only has poor heat dissipation but may also generate parasitic capacitance and inductance at high frequencies, introducing interference.
Secondly, avoid "neck" structures in the copper trace. In some designs, the copper trace suddenly narrows when passing through device pins or vias (e.g., from 5mm to 1mm), causing a sudden increase in current density and heat concentration, forming a "hot spot." The correct approach is to allow the copper trace width to transition gradually, or to add auxiliary copper traces in the narrowing area to ensure even current distribution. At the same time, avoid dense stacking of copper traces, especially near power modules, and provide sufficient space for heat dissipation to prevent the accumulation of heat from multiple copper traces.
III. Suppress electromagnetic interference and reduce signal interference and radiation.
The high-frequency switching action of a switching power supply generates strong electromagnetic interference. If the copper traces are not properly designed, they can become "transmitting antennas" or "receiving antennas" for interference, affecting the stability of their own control signals and potentially interfering with surrounding electronic equipment. Therefore, copper traces must adhere to electromagnetic compatibility (EMC) design principles, suppressing interference through layout and wiring methods.
On the one hand, it is necessary to strictly distinguish between the copper traces of "power circuits" and "control circuits". Power circuits (such as input filtering, power switching, and output rectifier circuits) have large current and high frequency, and are the main sources of interference. The trace length should be shortened as much as possible to reduce the loop area—the smaller the loop area, the weaker the radiated magnetic field generated. For example, the connection between the power switch and the rectifier diode should be controlled within 3cm, and a "short, straight, and wide" trace method should be used to avoid detours and bends. Control circuits (such as PWM control signals and feedback signal circuits) have small current and high sensitivity, and are easily interfered with. They should be kept away from the copper traces of power circuits, with a distance of at least 2mm between them. If space permits, a "grounding isolation strip" (grounding copper trace with a width of 1-2mm) can be set between them to block the conduction of interference.
On the other hand, for high-frequency signal traces (such as PWM drive signals), impedance matching and shielding designs are required. The characteristic impedance of copper traces is related to their width, thickness, and dielectric thickness. During design, the matching impedance (e.g., 50Ω or 75Ω) must be calculated based on the signal frequency to ensure reflection-free signal transmission. Simultaneously, grounding copper traces can be laid on both sides of the high-frequency traces, with grounding vias placed every 5-10mm to form a microstrip line structure, reducing signal radiation. Furthermore, feedback signal loops (such as output voltage sampling loops) should use differential wiring or twisted-pair cabling to ensure the two sampling copper traces are closely parallel and of consistent length, thus offsetting the influence of external interference on the sampling signal.
IV. Properly arrange the grounding copper foil to avoid grounding noise.
The design of the grounding copper trace is one of the core challenges in PCB routing for switching power supplies. Improper grounding can lead to grounding noise (such as ground bounce noise), affecting the accuracy of control signals and even causing unstable power output. Therefore, a "zonal grounding" approach should be adopted according to the grounding requirements of different circuits to avoid mutual interference between grounding currents of different circuits.
First, distinguish between "power ground," "signal ground," and "shield ground." Power ground (PGND) is used for grounding power circuits, such as the heat sink of power devices and the grounding of input/output filter capacitors. Its copper trace should be designed to be wide and short, and directly connected to the power plane to ensure rapid discharge of large currents. Signal ground (SGND) is used for grounding control circuits, such as the grounding of PWM chips and feedback circuits. It should have a separate grounding copper trace, and be connected to power ground through "single-point grounding" (i.e., connecting signal ground and power ground at only one point) to prevent large currents from flowing from power ground into signal ground and generating noise. Shield ground (FGND) is used for grounding shielding layers, such as the input line shielding layer and the casing grounding. It needs to be isolated from power ground and signal ground, and connected only at the grounding reference point to prevent interference introduced by the shielding layer from being conducted to the internal circuitry.
Secondly, avoid "grounding loops." A grounding loop refers to a closed loop formed by the grounding copper traces. Under the influence of an external magnetic field, this can induce a current and introduce interference. During design, all grounding copper traces should converge to a common grounding reference point (such as the negative terminal of the power supply or the ground plane of the PCB), and grounding copper traces in different areas should not form closed loops. For example, the signal ground copper trace should be directly connected to the grounding reference point, rather than indirectly connected through the power ground copper trace; multiple grounding vias should be centrally located near the grounding reference point to avoid scattered layouts that create loops.
V. Other details and precautions
In addition to the core points mentioned above, some details need attention when routing copper traces to avoid affecting overall performance due to minor errors. For example, copper traces should avoid sharp angle bends (less than 90°). Sharp angles cause current to concentrate at the corner, increasing resistance and heat, and also creating electric field concentration at high frequencies, introducing interference. The correct approach is to use a 45° angle or a rounded transition. The connection between the copper trace and the device pins must be tight to avoid "loose connections"—the soldering area between the pin and the copper trace should be larger than the pin width, and the solder pads on the copper trace should be 0.2-0.3mm larger than the pins to ensure a firm solder joint.
In addition, the limitations of PCB manufacturing processes must be considered. For example, the minimum width and spacing of the copper traces must meet the manufacturer's production capacity (under conventional processes, the minimum width and spacing should not be less than 0.2mm); if buried vias or blind vias are used, the reliability of the connection between the copper traces and the vias must be ensured; for multilayer PCBs, the copper traces on different layers must be reasonably connected through vias to avoid signal or current interruptions. Furthermore, after the PCB design is completed, simulation software (such as the signal integrity analysis tool in Altium Designer) must be used to verify the impedance, current density, and heat dissipation effect of the copper traces to identify and correct problems in a timely manner.
In summary, the design of copper traces on a switching power supply PCB is a systematic project that requires comprehensive consideration of factors such as current carrying capacity, heat dissipation, electromagnetic interference, and grounding. Only by strictly adhering to design specifications and paying attention to detail optimization can we ensure that the copper traces meet the performance requirements of the switching power supply, improve the stability and reliability of the product, and lay a solid foundation for subsequent production and application.
