Abstract: This paper discusses the design method of the interface board for the Quzhuo computer numerical control system based on the EPP protocol, and gives the specific implementation scheme of the interface board in terms of hardware and software. Keywords : Enhanced Parallel Port (EPP), Zero Computer Numerical Control System, Virtual Device Driver (VxD) To achieve a zero-computer numerical control (NC) system, the interface module must be physically separated from the computer, becoming an external structure. This can be achieved using the Enhanced Perimeter Port (EPP) bus protocol, a high-performance peripheral interface mode conforming to the IEEE 1284 standard with a data transfer rate of 2 m/s. This protocol significantly improves the data transfer capability of the PC's perimeter, making the perimeter data transfer rate equivalent to the capability of a standard PC's internal ISA bus. By using the EPP bus protocol, the NC system interface module can become a peripheral similar to a printer; any computer can use the interface module after installing the driver. Based on this idea, this paper discusses the design method of a zero-computer NC system interface module. This interface module uses large-scale programmable logic devices (MLDs) to simplify hardware design to the greatest extent possible, thereby reducing costs, improving reliability and anti-interference capabilities, and broadening the application of computers in NC. 1. Introduction to EPP Protocol 1. EPP Protocol Signal Definitions and Timing EPP (Entumerated Parallel Port) is an enhanced parallel port defined by the IEEE 1284 protocol. The EPP protocol is compatible with the standard parallel port (SPP) and can complete parallel data transmission. Table 1 shows the EPP parallel port signal definitions. The EPP protocol defines an 8-bit multiplexed address port communication protocol and implements it using high-speed digital logic circuits. The EPP protocol allows one byte of data to be transmitted within one ISA I/O cycle, with a transmission rate comparable to the PC bus, reaching a transmission rate of up to 2MB/s. The EPP protocol defines four transmission cycles: data write cycle, data read cycle, address write cycle, and address read cycle. The data cycle is generally used for data transmission between the host and peripherals; the address cycle is generally used to transmit address, channel, command, and control information. The difference between the data cycle and the address cycle lies only in which pulse from nADDSTB or DATASTB is selected for the port. Figure 1 shows the timing diagram of the EPP data write cycle to illustrate the EPP transmission timing. At time T1, the application EPP writes data, initiating the EPP I/O write cycle. At time t2, the host sets nWRITE low and places data on data line ADOAD7. If the host detects nWA1T is low, it sets the nWRITE pulse low at time t3, thus initiating data transmission. Upon receiving the signal, the peripheral sets nWAIT high at time t4. In response, the host sets the DATA5 pulse high at time t5. At time t6, the host sets both nWRITE and IOW high, ending the I/O cycle. The next cycle will begin when the peripheral resets nWRITE to low. 1.2 EPp/SPP Register Interface To maintain compatibility with SPP, the EPP register does not occupy the three lower addresses of the interface. For I/O operations at base address +0 to +2, the result is the same as that of the standard parallel port (SPP). This ensures its compatibility with standard wellhead peripherals and printers. The software can control the operating mode of the parallel port by setting the parallel port control register (base address +02H). Setting the most significant bit (seventh bit) of this register to high level enables the enhanced parallel port mode. When it is low level (default state), the port operates in standard mode. The sixth bit of this register controls the port classification as directional (sixth bit high level) or unidirectional (sixth bit low level). The definitions of the EPP/SPP software registers are shown in the table below. 2 Hardware Design of the Interface Board According to the requirements of the CNC system, the interface board consists of the following circuits: bus interface circuit, digital input/output circuit, analog input/output circuit, and position control circuit. The principle block diagram of the system hardware is shown in Figure 2. Bus interface circuit. It consists of a 74HC245 bus transceiver, a 74HC574 eight-stage D flip-flop, a 74HC6 comparator, and a GAL16V8. Unlike interface circuits for other protocols, the EPP-based board is located outside the computer, resulting in longer circuitry. Therefore, both data and address signals should be driven into the board via the 74HC245 bus, and the address signal should be latched into the 74HC574 to ensure signal integrity. This logic is implemented by a GAL16V8 using nWRITE, nDATASTB, and nDDRSTB. The high-order bits of the latched address signal enter the 74HC688 to generate the board select signal, while the low-order bits of the address, control signals, and the board select signal generated by the 74HC688 enter another GAL16V8 to generate the corresponding chip select signal, completing the decoding process. Digital input/output circuitry. The digital input circuit consists of a 74HC245 and a TLP521. External digital signals, isolated by a TLP521, are read from the data and fed into the bus via a 74HC245, then acquired and processed by the computer. The digital output circuit consists of a 74HC574, TLP521, and ULN2803. The output digital signal is latched into the 74HC574 during the data write cycle, opto-isolated, and then output via U12-2803 to improve current drive capability. Analog input circuit: Based on the characteristics of the mechanical system, the analog input uses a MAX186 chip with external protection circuitry. The MAX186 is a 12-bit serial A/D converter from Maxim Integrated, with a built-in 4.096V reference source and a holding circuit, compatible with the SPI serial interface. In the design, the control signal is connected to the MAX186's SPI interface via a 74HC574. The software generates a serial clock, inputs a control word, and controls the MAX186's conversion. The MAX186's output DOUT is read into the computer via the bus in the next control cycle. The analog output consists of a MAX525 chip and an amplifier circuit. The MAX525 is a four-channel, voltage-output 2-bit serial D/A converter from Maxim Integrated, compatible with a 5PI serial interface. The computer connects the control signal to the MAX525's SPI interface via a bus, and the software generates the forward clock, inputs the control word, and 12-bit data. The analog signal converted by the MAX525 is output through a differential amplifier circuit. The position control circuit, given that modern servo motors are generally fully digital and integrated, and feature pulse train input, consists of a pulse generator circuit (forward channel) and a motor encoder quadruple frequency counter circuit (feedback channel). In practical design, using discrete components would not only complicate the structure but also reduce the system's reliability. In this design, the above circuit is implemented using a Xilinx XC4005 FPGA device, capable of simultaneously controlling the movement of three axes. With slight modifications, this circuit can also be used for stepper motor control. Except for the bus interface circuit, the rest of the circuit is modular. Different modules are selected to meet the requirements of different applications. 3. Software Design of the Interface Template The software design of the interface template mainly refers to the device driver design under the Windows 95 environment, including interface card initialization, data transmission, and data processing. The following is a brief explanation of the software design principles using the Virtual Device Driver (VxD) as an example. The Virtual Device Driver is written in assembly language using the Windows 95 DDK, and the debugging tool is Softice for Windows. The VxD generated is statically loaded during Windows 95 startup. Since Windows 95 is not a real-time operating system, the following points should be noted when writing the program: Place frequently called code in the locked code vxD_LOCKED_CODE_SEG to prevent this code segment from being swapped out of memory. Define the attributes of important processes as High Freq. The initialization of the interface template is mainly implemented through programming the PC printer adapter, including setting the base address register, command register, and control register. The specific implementation is placed in the VxD initialization code segment VxDjCODE_SEG, which is loaded by the VxD during Windows 95 startup. Data transmission and processing are programmed into corresponding modules for different circuits: digital input/output modules, analog input/output modules, servo motor control output modules, stepper motor control output modules, and position feedback counting modules. These control modules are merged into a thin-layer software, thereby hiding the structure of specific hardware interfaces. These modules are thus independent of each other. Their main function is to complete data communication with the hardware, equivalent to function calls, executed by a software clock interrupt handler according to a time-slice priority scheduling strategy. They only operate on the corresponding segment of a memory area allocated by the thin-layer software and do not involve the hardware control algorithm. 4 Conclusion In summary, the organic combination of the zero-computer numerical control system design concept and the computer external bus EPP makes the hardware design of the numerical control system very simple and capable of meeting the requirements. This interface module has been applied in our center's third-generation laser rapid prototyping system and other CNC equipment, proving its good operation. References 1 Zhong Qing et al. Research on zero-computer numerical control system for laser rapid prototyping machine. Journal of Huazhong University of Science and Technology 1999 27(12):63～65 2 Liao Xiaohuang, Zhu Qiqiu. Numerical Control Machine Tools. Wuhan: Huazhong University of Science and Technology Press. 1992 3 Liu Leshan et al. Principles and Applications of Microcomputer Interface Technology. Wuhan: Huazhong University of Science and Technology Press. 1996 Click here to download the original text