Abstract: This paper utilizes power electronics technology, including rectification and inversion, as well as control technologies related to energy feedback, such as signal feedback control and digital signal processing (DSP). By tracking and capturing the grid power signal, the regenerative energy generated by the servo motor during rapid braking and frequent forward and reverse rotation is converted into an electrical energy signal synchronized with the grid power signal in the form of an SPWM wave. Simultaneously, harmonic interference components in the regenerative energy SPWM wave are filtered out to improve the power factor, and the regenerative energy is fed back to the grid for optimized recovery. Keywords: Energy feedback; Power factor; SPWM modulation; TMS320 F2812DSP 1 Introduction When a servo motor is powered, it operates as a motor, absorbing energy from the grid; during braking, it operates as a generator, outputting energy in reverse. How to recover and utilize the regenerative energy generated by the servo motor during rapid braking and frequent forward and reverse rotation is of great value for energy conservation. The most common solution today is to use power electronics technology, employing semi-controlled thyristor devices in the rectification and inversion circuits to control the conduction angle and invert the regenerative energy generated during motor braking back to the grid. This technology is quite mature, but it has several drawbacks: First, due to the use of semi-controlled thyristor devices, improper inverter angle control, thyristor failure, unreliable trigger circuit operation, or insufficient commutation margin angle can easily lead to inverter failure. Second, the low displacement factor and fundamental factor of the thyristor phase-controlled rectifier circuit result in severe distortion of the grid power waveform, large harmonic components in the waveform, and a very low power factor, significantly reducing the quality of regenerated energy feedback. This paper discusses applying SPWM technology to a rectifier-inverter circuit composed of fully controlled devices such as MOSFETs and IGBTs. A control and feedback circuit is constructed using the TMS320F2812DSP chip and its peripheral devices to feed the regenerated energy of the servo motor back to the grid. The basic idea of ​​SPWM is to make the pulse width of the output control signal vary sinusoidally. This modulation technique can effectively suppress low-order harmonic components in the output voltage. The TMS320F2812DSP is a chip from TI suitable for inverter and motor control, integrating real-time processing capabilities and controller peripheral functions. High-performance processors, characterized by high computational accuracy, high speed, and high integration, provide an excellent solution for delivering high-quality SPWM control signals. Therefore, through appropriate control of the PWM rectifier-inverter circuit, the input signal can be made very close to a sine wave, with the current and voltage signals either in phase or out of phase, and the power factor approximately 1. This is highly effective in suppressing grid harmonics, improving the grid power factor, and enhancing power feedback quality—something that conventional semi-controlled thyristors using conduction angle control cannot match. 2. System Working Principle The system control principle is shown in Figure 1. The main circuit components of this system include reactors, surge suppressors, a three-phase full-bridge rectifier, an energy storage capacitor Uc, an IGBT voltage-source inverter, and a pre-filter. The peripheral control circuits include IGBT drive circuits, a DSP central processing unit, current and voltage signal detection, fault detection, external power supply, and an external clock. The regenerative energy generated during frequent braking of the servo motor is stored in capacitor Uc. When the voltage across Uc reaches a certain limit, the DSP control system starts the three-phase bridge voltage-type active inverter, feeding the energy stored in Uc back to the grid in the form of an SPWM wave. Figure 1 System Control Principle 2.1 DSP Chip Features The TMS320F2812DSP is a 32-bit fixed-point chip with powerful digital signal processing, event management, and embedded control capabilities. Key features include: a high-performance central processing unit with a 150MHz clock speed; a high-performance 12-bit, 16-channel analog-to-digital converter (ADC); a 200ns conversion time; up to 16 analog inputs; a TMS320F24x-based CPU core ensuring code compatibility with the TMS320 series DSPs; two event manager modules, EVA and EVB, each providing two 16-bit general-purpose timers and eight 16-bit PWM channels; up to 128K x 16-bit on-chip FLASH memory; low power consumption and energy-saving modes; and more. 2.2 Current and Voltage Signal Sampling In real-time control, the DSP needs to track and sample the grid voltage and current to generate an SPWM signal synchronized with the grid. This is mainly accomplished by the sampling circuit. This design uses a Hall sensor to acquire the signal. To improve the signal acquisition quality, it needs to pass through a first-order filter, a limiting circuit, and an emitter follower connected to the DSP's analog input signal pin. The Hall sensor output signal voltage is 0–5V, while the F2812 analog input signal voltage range is 0–3V, requiring the circuit to perform level conversion. This design uses a resistor divider to achieve level conversion. 2.3 A/D Signal Conversion After the sampled signal arrives at the analog input channel, it is converted by the DSP's internal A/D conversion circuit. The TMS320F2812 ADC module is a 12-bit pipelined analog-to-digital converter (ADC). The analog circuit of the ADC unit includes forward analog multiplexers (MUXs), a sample/hold (S/H) circuit, a conversion core, a voltage reference, and other auxiliary analog circuits. The ADC module has 16 channels and can be configured as two independent 8-channel modules, serving the event managers EVA and EVB respectively, or cascaded into a single 16-channel module. Each channel module can automatically sort itself. For each channel, once the ADC conversion is complete, the conversion result is stored in the result register (ADCRESULT). The data in the result register is read out through appropriate interrupt handling and interrupt service routines. To obtain higher accuracy conversion results, the input signal lines connected to the analog input should be kept as far away as possible from the digital circuit signal lines in the hardware design. To reduce coupling interference caused by digital signal conversion, the power input of the ADC module needs to be isolated from the digital power supply. 2.4 Synchronization Signal Capture: The SPWM control signal required for the inverter circuit to feed back energy is a pulse width modulation signal synchronized with the power grid. First, the grid current and voltage signals are passed through a hysteresis comparator circuit to generate positive pulses synchronized with the grid signal at the zero-crossing moment. Then, the positive pulses are captured by the capture unit of EVA or EVB in the TMS320F2812DSP. Each time a positive pulse is captured, the capture unit stores the number of internal clock cycles. The difference between the two stored clock cycles is the clock cycle number of the power grid signal. Therefore, by capturing the power grid signal in real time, the SPWM control signal can track the changes in the power grid signal in real time. The synchronization and periodicity of its signal are equivalent to those of the power grid signal, thus achieving the intended purpose. 2.5 Harmonic Components and Their Filtering The SPWM inverter signal generated by the three-phase bridge inverter circuit contains certain harmonic components during the feedback process to the power grid. Since this design uses the SPWM wave control form, the harmonic components are relatively few when the three-phase current is inverted and fed back to the power grid. It does not contain low-order harmonics related to the modulation wave ωr, nor does it contain frequency harmonics that are integer multiples of the triangular carrier wave ωc. It only contains high-frequency harmonics near the multiples of the triangular carrier wave ωc, among which the higher amplitudes are ωc+2ωr, ωc-2ωr, 2ωc+ωr, 2ωc-ωr, etc. These higher harmonic frequencies are much higher than the fundamental frequency and are very easy to filter out: if the filter is designed as a high-pass filter, and designed according to the carrier angular frequency, and has a certain bandwidth, then the high-frequency harmonics ωc+2ωr, ωc-2ωr, 2ωc+ωr, 2ωc-ωr, etc. near the ωc multiple of the triangular carrier can be filtered out. 3 System Software Design 3.1 System Initialization System initialization includes: system control initialization, GPIO, GPAMUX and GPBMUX initialization, disabling the system global interrupt (INTM=1) and initializing the PIE interrupt vector table, masking CPU interrupts and interrupt flags, etc. 3.2 Event Manager Settings In order for the event manager EVA or EVB to generate the required SPWM control signals, the manager's registers need to be configured as follows: set and load ACTRx; set and load DBTCONx, enable dead-time function; initialize CMPRx; set and load COMCONx; set and load T1CON (for EVA) or T3CON (for EVB); set TxPR according to the period of the required SPWM carrier; start operation. Using timer periodic interrupts, the interrupt subroutine is cyclically polled, and the value CMPRx of the compare register is updated in a timely manner using the SPWM pulse width (duty cycle) calculated by the software in the interrupt subroutine. 3.3 Determination of the Timer Period Register Value TxPR Let the number of cycles of the power grid sinusoidal signal be T, the number of SPWM pulse modulation waves required for each sinusoidal cycle be N, the number of CPU instruction cycles be Ts (6.67ns for TMS320F2812), and the clock prescaler be M. When using the continuous increment counting mode, the required value of the period register is TxPR = T/(N*M*Ts); when using the continuous increment/decrement counting mode, the required value of the period register is TxPR = T/2(N*M*Ts). However, since the capture unit in the event manager is used in this design, the number of periodic pulses of the sinusoidal signal can be directly obtained from the capture unit stack, denoted as X. If the number of SPWM pulse modulation waves required for each sinusoidal cycle is N, then the required value of the period register is TxPR = X/N or TxPR = X/(2N). The use of the event manager capture unit allows the control signal to track the changes in the power grid signal frequency in real time, ensuring that the frequency of the generated SPWM signal is equal to the frequency of the power grid signal. 3.4 Determination of the Comparison Register Value CMPRx According to the principle of regular sampling, the width of each rectangular wave in the SPWM modulation wave is δ = Tc * [1 + a * Sin(ω * t)] / 2. Where a is the modulation index, 0 <= a < 1; ω is the angular frequency of the sinusoidal modulation signal; t is the sampling time; and Tc is the carrier period. The duty cycle k of the rectangular waveform can be calculated from the rectangular wave width δ and the carrier period Tc. Multiplying the duty cycle by the period register value TxPR yields the comparison register value CMPRx. When the pulse sampling point is between 0 and π, the duty cycle k = δ/Tc = [1 + a * Sin(ω * t)]/2, and the comparator register value CMPRx = (Tc - δ)/2 = Tc * [1 - a * Sin(ω * t)]/4; when the pulse sampling point is between π and 2π, the duty cycle k = δ/Tc = [1 - a * Sin(ω * t)]/2, and the comparator register value CMPRx = (Tc - δ)/2 = Tc * [1 + a * Sin(ω * t)]/4. 3.5 System Program Flowchart 2 Main Program Flowchart 3 Interrupt Subroutine Flowchart 4 Conclusion By utilizing the peripheral control circuit and the processing of the DSP chip's internal event manager ADC, capture, and other units, and through real-time circuit simulation using CCS2000, satisfactory simulation graphics and experimental results were obtained. This design is successful. The innovations of this paper are as follows: 1. The TMS320F2812 event manager is used to generate SPWM control waveforms, realizing feedback control of regenerative energy of the servo motor. This effectively avoids harmonic interference caused by the traditional semi-controlled thyristor control mode, improving the quality of energy feedback. In this design, the filter is designed as a high-pass filter with a certain bandwidth carrier angular frequency, effectively filtering out the small amount of high-frequency harmonics near the carrier harmonics in the feedback energy. 2. Through the writing of the event manager software program, the three-phase SPWM signal waveforms for controlling the IGBT are directly generated, eliminating the need for modulation wave, carrier modulation comparison, and other related circuits, simplifying the hardware circuit design and saving cost and time. References: [1] Power Electronics Technology / Wang Zhaoan, Huang Jun (eds.). Beijing: Machinery Industry Press, 2000 [2] TMS320F2812 Principles and Development / Su Kuifeng, Lü Qiang, et al. (eds.). Beijing: Electronic Industry Press, 2005 [3] Design of Voltage Regulation Circuit Based on Microcontroller/CPLD Wu Songyan, Yu Songyu, Guan Yunfeng. Microcomputer Information, 2006, 9