Cellular communication base station technology has evolved to include modulation schemes for 2.5G and 3G, raising the requirements for generating more complex RF signals. By monitoring and controlling the performance of power amplifiers (PAs) in the base station, the output of the power amplifier can be maximized while simultaneously achieving optimal linearity and efficiency. This article will discuss how to monitor and control power amplifiers using discrete integrated circuits. The performance of a wireless base station, evaluated in terms of power consumption, linearity, efficiency, and cost, is primarily determined by the power amplifiers in the signal chain. The low cost and high power characteristics of LDMOS transistors make them the amplifier choice in today's cellular base station power amplifier designs. However, inherent trade-offs in linearity, efficiency, and gain determine the optimal bias state of the LDMOS power amplifier transistors. [align=center] Figure 1 Simplified Control System[/align] Due to environmental reasons, optimizing the power efficiency of base stations is also a major consideration for companies in the telecommunications industry. Significant efforts are currently being made to reduce the total energy consumption of base stations, thereby reducing their environmental impact. The main daily operating cost of a base station is electricity, and power amplifiers can consume more than half of the power required by the base station. Therefore, optimizing the power amplifier's power efficiency can improve operational performance and provide environmental and financial benefits. By controlling the drain bias current to maintain a constant value over temperature and time, the overall performance of the power amplifier can be greatly improved while ensuring that the amplifier operates within an adjusted output power range. One method of controlling the gate bias current is to optimize the gate voltage during the testing and evaluation phase and then fix it with a resistor divider. While this fixed gate voltage method is effective and low-cost, its main drawback is that it does not take into account changes in environmental conditions, manufacturing tolerances, or power supply voltage. Using a high-resolution DAC or a lower-resolution digital potentiometer to dynamically control the power amplifier's gate voltage provides stronger control over the output power. A user-adjustable gate voltage allows the power amplifier to maintain its optimal bias current state regardless of changes in voltage, temperature, and other environmental parameters. Two main factors affecting the power amplifier's drain bias current are: 1. Variations in the power amplifier's high-voltage power line. 2. Chip temperature variations. The drain voltage of the power amplifier transistors is easily affected by variations in the high-voltage power line. By using a high-end current-sense amplifier to accurately measure the current on the high-voltage power line, the drain voltage of the power amplifier transistor can be monitored. An external sensing resistor is used to set the full-scale current reading. In high-current monitoring applications, the sensing resistor must be able to dissipate I²R of power. If the resistor's power dissipation limit is exceeded, its resistance will drift or it will fail completely, causing the differential voltage across the resistor to exceed its absolute maximum value. The voltage measured at the current sensor output can be sampled by an ADC to generate a digital value for monitoring. It is crucial that the current sensor's output voltage be as close as possible to the ADC's full-scale input range. Constant monitoring of the high-voltage power line allows the power amplifier to readjust its gate voltage when a surge voltage is detected on the high-voltage power line, thus maintaining an optimal bias state. The source-drain current IDS of an LDMOS transistor contains two temperature-dependent parameters: effective electron mobility μ and threshold voltage Vth. Both the threshold voltage Vth and effective electron mobility μ decrease with increasing temperature; therefore, temperature changes will cause changes in output power. Using one or more discrete temperature sensors to measure the power amplifier's temperature allows for monitoring of temperature changes on the circuit board. Many types of discrete temperature sensors are available to meet system requirements, ranging from analog output temperature sensors to digital output temperature sensors with single-wire I2C and SPI interfaces. [align=center]Figure 2 Typical HPA signal chain[/align] Inputting the temperature sensor's output voltage into an ADC via a multiplexer converts the temperature data into a digital quantity for monitoring. Depending on the configuration, several temperature sensors may be needed on the circuit board. For example, if multiple power amplifiers are used, or several pre-drives are required at the front end, using one temperature sensor for each amplifier provides greater control over the entire system. In this case, a multi-channel ADC is needed to perform analog-to-digital conversion on the analog outputs of each temperature sensor. Modern ADCs typically include an internal over-range alarm function. This additional function generates an alarm signal when the input exceeds a pre-programmed limit, which is extremely useful for monitoring the outputs of temperature and current sensors in the power amplifier signal chain. The upper and lower limits of the monitored range can be preset via a program, and an alarm signal is only generated when the range is exceeded. Hysteresis registers are typically used in this type of design. These registers determine the reset point after an alarm signal is issued due to an out-of-range condition. Hysteresis registers prevent the alarm characteristic bit from being constantly toggled when there is significant noise in the temperature or current sensor readings. For example, Analog Devices' I2C interface 2-, 4-, and 8-channel 12-bit low-power ADCs—AD7992/4/8—all have this out-of-range indication function. With the use of control logic circuitry, the outputs of the current and temperature sensors can be continuously monitored. While monitoring the sensor readings, the power amplifier gate voltage can be dynamically controlled using a digital potentiometer or DAC to maintain an optimal bias state. The required control amount for the gate voltage will determine the DAC's resolution. Telecommunications companies typically use multiple power amplifiers in base station designs, as shown in Figure 2, because this provides greater flexibility in selecting power amplifiers for each RF carrier device. Each power amplifier can be optimized for a specific modulation scheme. Parallel connection of power amplifiers can also improve linearity and overall efficiency. In this case, the power amplifier may require multiple gain stages cascaded, including the use of variable gain amplifiers (VGAs) and pre-drivers to meet gain and efficiency requirements. A multi-channel DAC can fulfill the various level setting and gain control requirements of these functional blocks. [align=center]Figure 3 Power Detection[/align] For precise control of the power amplifier's gate voltage, ADCs such as Analog Devices' AD5321, AD5627, and AD5625 can provide 12-bit single, dual, and quad outputs. These devices have excellent source and sink current capabilities, eliminating the need for output buffers in most cases. These circuits combine low power consumption, monotonicity, and fast settling time, enabling precise voltage and current settings in applications. In applications where accuracy is not the primary consideration and 8-bit resolution is acceptable, digital potentiometers are a lower-cost option. These potentiometers offer the same electronic adjustment capabilities as mechanical potentiometers or variable resistors, but with better resolution, solid-state reliability, and superior temperature performance. Non-volatile and one-time programmable (OTP) digital potentiometers are ideal for time-division duplex (TDD) RF applications, where the power amplifier is off during TDD reception and on with a fixed gate voltage during transmission. This programmable start-up voltage reduces turn-on delay and improves efficiency when transitioning to transmit mode while the power amplifier transistor is on. The ability to turn off the power amplifier transistor during reception prevents transmit noise from interfering with the received signal. This technology also improves the overall efficiency of the power amplifier. Numerous digital potentiometers are available depending on the number of channels, interface type, resolution, and non-volatile memory requirements. For example, Analog Devices' AD5172—a 256-position, one-time programmable, dual-channel I2C potentiometer—is well-suited for level setting in RF amplifiers. Precise measurement of the power level of complex RF signals at the amplifier output allows for more controlled amplifier gain, thereby optimizing device efficiency and linearity. Using a root mean square (rms) power detector, accurate RMS power levels can be extracted from RF signals in W-CDMA, EDGE, and UMTS cellular base stations. In Figure 3, the output of the power detector is connected to the gain control of the power amplifier. Based on the deterministic relationship between VOUT and the RF input signal, the power detector adjusts the voltage at VOUT (which is now the output of an error amplifier) ​​until the RF input level matches the set VSET. The ADC and DAC form a feedback loop that tracks the power detector output and adjusts its VSET input. This gain control method can be used with variable gain amplifiers (VGAs) and variable voltage amplifiers (VVAs) in the early stages of the signal chain. To test both transmit and receive power, existing dual power detectors can be used to simultaneously detect the two composite signals. In systems with a VGA or pre-driver preceding the power amplifier, only one power detector is needed. In this case, the gain of one of the devices is fixed, while VOUT is fed to the control input of the other device. [align=center]Figure 4 Analog Comparator Control Loop[/align] [align=center]Figure 5 Monitoring and Control of Power Amplifier Using Discrete Components[/align] When a voltage spike or excessive current is detected on the high-voltage power line, the digital control loop is not fast enough to protect the device from damage. The digital control loop consists of a high-side current sensor, an analog-to-digital converter (ADC), and external control logic to process the digital signals. If the loop determines that the current on the power line is too large, it sends a command to the DAC to lower the gate voltage or shut down the DAC. The RF switch, in conjunction with the output of the analog comparator, controls the RF signal input to the power amplifier, as shown in Figure 4. If a large current is detected on the power line, the RF signal can be cut off to prevent damage to the power amplifier. Using an analog comparator means no digital processing is required, making loop control much faster. The output voltage of the current sensor can be directly compared with the fixed voltage set by the DAC. When a voltage higher than a fixed voltage is generated at the output of the current sensor, the comparator controls a control pin on the RF switch, causing it to toggle its level and immediately cutting off the RF signal to the power amplifier gate. A typical power amplifier monitoring and control architecture using discrete components is shown in Figure 5. In this case, only the power amplifier itself is monitored and controlled, but any amplifier in the signal chain can be monitored and controlled using this method. All discrete components operate through the same data bus, which in this case is the I2C data bus, and control is implemented using a master controller. From a design perspective, the main advantage of using discrete components for monitoring and control is that we can choose from a carefully selected set of tailored products. Suppliers are designing front-end signal chains for power amplifiers with unprecedented complexity, consisting of various gain stages and control techniques. Existing multi-channel ADCs and DACs are ideal for different system partitioning and architectures, allowing designers to achieve cost-effective distributed control.