Abstract : By analyzing the structural characteristics of the multi-channel digital down-converter AD6635, a design method for a multiphase finite impulse response (FIR) filter is proposed, and the corresponding parameters are given. This method constructs a multiphase filter by processing the same signal through multiple data paths in parallel. Simulation results show that the multiphase filter constructed using this method significantly improves the main filtering performance indicators such as transition band width, passband ripple, and stopband attenuation compared with the non-multiphase filter. Keywords: Multiphase filter, digital down-converter, finite impulse response, AD6635 0 Introduction Digital down-converter (DDC) devices mainly implement three functions: digital quadrature mixing, data rate conversion, and filtering and shaping output. The AD663 is a new generation of multi-channel digital down-converter from Analog Devices (Analog Devices). Based on the literature, this paper analyzes the structural characteristics of the AD6635 and designs a multiphase FIR filter that can be implemented in the AD6635 to improve the performance of the finite impulse response (FIR) filter. 1. Structural Features of the AD6635 The AD6635 has a typical structure of a multi-channel digital converter (DDC). Each data processing path in the AD6635 has a complete signal processing stage. In each path, the first signal processing stage is digital quadrature mixing, followed by a first-stage fractional rate conversion using a two-stage resampling integral comb filter (rCIC2), then a second-stage integer rate reduction using a five-stage integral comb filter (CIC5), and finally filtering and shaping using a maximum 16th-order FIR filter (RCV). Before output, a half-band filter (HB) can be used for 2x interpolation, followed by formatted output after automatic gain control (AGC). The hardware structure of the AD6635 is extremely flexible. The AD6635 is divided into two parts, each with two data input ports, four data processing paths (channel 1), two HBs, two AGCs, and two output ports. The data processed by the four paths in each part can come from either of the two input ports of that part. The input to the FIR filter can come from this data path or from other data paths within this section. The HB port after the RCF can perform 2x interpolation or multiplexing of multiple data streams. To ensure compatibility with port time-division multiplexed A/D chips (such as the AD6600), each data input port can receive two multiplexed data streams, which are then distributed to two channels. Therefore, although the AD6635 is a 4-channel DDC chip, it has eight independent data processing paths. The input data to the HB port can come from any one or more data paths within this section, allowing for data multiplexing. These features of the AD6635 lay the hardware foundation for implementing a polyphase FIR filter. It is important to note that for each stage of the data path, all input-output connections must not cross two sections. [b][align=center]For more details, please click: Polyphase Implementation of FIR Filters in AD6635[/align][/b]