Abstract: Motion control systems based on MCUs and DSPs have promising development prospects due to their compact structure and good environmental adaptability. Given the significant differences in resource environments between PCs and MCUs and DSPs, research on motion control technology in MCU and DSP environments is essential. The hardware platform design for motion control research based on MCUs and DSPs follows the development direction of open, reconfigurable, and networked motion control systems. It selects mainstream MCU and DSP chips S3C2410A and TMS320F2812, adapting to the networking requirements of information networks, control networks, and servo networks (interfaces). A two-layer, combined mode is adopted to realize a practical and reliable hardware environment. It can conduct research on motion control algorithms and system support software using single CPUs, parallel dual CPUs, and hierarchical multi-CPUs. Keywords: MCU, DSP, Motion control hardware 0 Introduction The open controller architecture originates from the "open" PC (personal computer) technology. Currently, most open motion controllers are PC + motion control card structures. With the increasing performance of MCUs (microcontrollers) and DSPs (digital signal processors), the trend of MCUs and DSPs replacing PCs is becoming increasingly apparent. This embedded, compact structure has a wider range of environmental adaptability than PCs. MCU, DSP and PC are quite different. The motion control technology in the PC environment cannot be directly transferred to the MCU and DSP system. Research on motion control technology based on MCU and DSP hardware platform is very necessary. 1 Design goals and requirements analysis 1.1 Development direction of motion control system Driven by open controller technology, motion control system has developed from the traditional closed structure to open, reconfigurable and networked direction. According to the definition of "Open CNC System Part 1: General Rules" (GB/T 18759.1-2002) [1], open CNC system has three levels of openness. The first level is that the system function is configurable and the human-machine interface, the motion control interface of the servo drive unit and the logic control unit interface are all open. The second level is that the system software architecture, topology and application software interface are open. Third-party application software can be installed and run in the system and achieve interoperability. The third-party software module can replace and expand the software module of this system without changing the topology. The third level is that the system is reconfigurable. The national standard GB/T 18759.1-2002 has not yet published the detailed content of reconfigurability. Motion control systems are a core component of CNC systems, and their technological development direction is similar to that of open CNC systems. Modern motion controllers connect three networks: information network, logic control network, and servo control network (interface). 1.2 Research Topics of Motion Control Technology in MCU and DSP Environments Compared with PCs, MCUs and DSPs adopt Harvard architecture, pipeline technology, very long instruction words, multipliers, etc. to improve CPU speed, and expand on-chip forward and backward channel peripherals and communication interfaces for control. In this environment, to realize open, reconfigurable, and networked motion control functions, the following research is necessary: ​​① Research on system architecture to implement complex motion control in a multi-CPU manner; ② Research on real-time operating systems in embedded systems to solve software problems of MCU and DSP controller systems; ③ Research on motion control algorithms in MCU and DSP environments to solve the problem of implementing complex control algorithms under limited resources; ④ Research on software module management and customization technology to solve the application-specificity problem of general technical solutions; ⑤ Research on network communication technology: solving the communication problems of servo communication network, logic control network, and information network. 1.3 Hardware System Design Goals and Structural Requirements The design goal of the hardware platform for motion control technology research based on MCU and DSP is to provide a hardware system environment for the above research topics. Commercial motion controllers with MCU or DSP as their core are not uncommon, but they only provide users with interfaces for motion control function libraries and are not fully open. Therefore, a hardware research platform for motion controllers must be developed and meet the following requirements: ① Type and Structure Requirements: The CPU selection should be mainstream MCU and DSP chips. The architecture should adopt single-CPU, dual-CPU pipeline modes, and hierarchical structures. The CPUs can work independently or form a pipeline mode. A two-layer structure can also be used, with the upper and lower layers handling tasks with different real-time requirements. ② Openness Requirements: Each CPU unit should be equipped with a computer communication interface, such as RS232, PCI, CAN, USB, etc., to facilitate hardware interconnection. ③ Networking Requirements: Equipped with servo unit interfaces, fieldbus interfaces, and Ethernet interfaces. 2 System Design 2.1 Hardware Structure of the Motion Control System The basic hardware structure of the motion control system is shown in Figure 1: Figure 1. Basic Hardware Structure of the Motion Control System The controller connects to the human-machine interface and three networks. The connection between the controller and the human-machine interface often uses open industrial fieldbuses such as ModBus; the controller connects to the Internet/Intranet via Ethernet interface to interact with management information systems; the controller communicates with networked PLC workstations via fieldbuses such as CAN, ModBus, and RS485 to handle a large number of I/O operations of the controlled objects; the controller connects to a high-speed servo network to transmit control signals from the servo amplifier, but this solution is technically difficult, and only a few companies have used dedicated high-speed servo communication networks to achieve servo motor networking. Most solutions still use standardized motor interfaces. The interface of a servo motor is as follows: ① 2-channel pulse waveform output, with a phase difference of 90°, or one of them can be used as a direction signal (high or low); ② 1-channel AD output, generally ±10V, with a bit depth of 12 or 16 bits; ③ 2-channel incremental encoder pulse input, one from the servo motor and the other from the actuator terminal; ④ 3-channel digital signal output, including servo enable, forward rotation limit, and reverse rotation limit; ⑤ Four digital signal inputs are provided, including servo ready, left limit, right limit, and zero position signals; the above interface circuit can also be connected to a stepper motor. The internal hierarchical structure of the motion controller is shown in Figure 2: Figure 2. Internal Hierarchical Structure of Motion Controller The upper-level controller handles complex control algorithms and weak real-time tasks, while the lower-level controller handles strong real-time tasks such as interpolation and servo control. Two DSPs form a dual-DSP pipeline module to process complex real-time control tasks in parallel. 2.2 Hardware Platform Design for Motion Control System Research 2.2.1 Main Chip Selection The principle for selecting MCU and DSP chips is applicability and versatility. The selected chips are suitable for open controller design and have extensive hardware and software resources. Samsung's S3C2410A chip uses an ARM920T core with a clock speed of up to 266MHz. It supports WinCE, Linux, and μC/OS-II real-time operating systems, has a 1GB expandable address space, and is equipped with on-chip peripherals such as interrupts, AD converters, UART, GPIO, a touchscreen, and a TFT interface. Texas Instruments' TMS320F2812DSP chip has a clock speed of 150MHz, supports DSP/BIOS and μC/OS-II real-time operating systems, has a 1MB expandable address space, and is equipped with on-chip peripherals such as interrupts, AD converters, a serial interface, and an event manager. Of these two CPUs, the S3C2410A is mainly used for control system management, monitoring, and the implementation of complex control algorithms, while the DSP is mainly used for servo motor interfaces and the implementation of strong real-time control algorithms such as feedback and filtering. 2.2.2 Hardware System Configuration The entire research platform is configured with three motherboards and one backplane, as shown in Figure 3. The three motherboards can be used individually or in combination, providing the hardware platform S3C2410A for MCUs, DSPs, and dual DSPs. The USB on the motherboard is the Host, and the USB on the other two boards is the Device configuration. In addition, the S3C2410A motherboard and the F2812 motherboard also have serial communication, GPIO and interrupt communication through the backplane. They can be combined into a two-layer structure with the S3C2410A motherboard as the host and the F2812-1 and F2812-2 motherboards as the slave. The S3C2410A motherboard handles weak real-time tasks, and the DSP handles strong real-time tasks. Figure 3. System hardware platform structure Weak real-time tasks include system monitoring, fuzzy and neural network and other complex control algorithms, and strong real-time tasks include interpolation calculation, digital filtering and PID control and other algorithms. This is to verify the feasibility of the algorithms in the MCU and DSP environments. 2.2.3 CPU expansion and peripheral configuration References [2] and [3] are typical expansion examples of S3C2410A and F2812 chips. According to the design requirements of this system, the block diagram of the S3C2410A motherboard is shown in Figure 4. Two HY58V561620CT-H chips are selected to form a 16M×32-bit RAM space; two E28F128J3A150 chips are selected to form a 16M×32-bit Flash space; an XC9536 CPLD is selected for GPIO address decoding and QEP interface implementation; a DAC8534A serial 16-bit DAC is selected to expand the digital-to-analog conversion interface; and a CS8900A Ethernet chip is used to expand the network interface. Figure 4. Block diagram of S3C2410A motherboard. The block diagram of F2812-1 motherboard is shown in Figure 5. An IS61V5126 is selected to expand 256K ROM space; an AM29LV800BT is selected to expand 512K Flash; an XC95144XL is selected for GPIO address decoding; an AN2131Q is selected for USB device expansion; and a 16-bit DAC8534A is added to the McBSP serial port for servo speed and torque control. In particular, the F2812 provides a complete servo motor interface. It has two event managers, each including two general-purpose counters, three compare/PWM units, three capture units, and a QEP channel. The PWM and general-purpose counters work together as the position control mode input for the servo controller, and the QEP channel can be used as the position encoder pulse input for the servo motor. The encoder signal at the actuator terminal is extended to the QEP input via a CPLD. Figure 5 shows the block diagram of the F2812-1 mainboard. The block diagram of the F2812-2 mainboard is shown in Figure 6. To verify the parallel control algorithm for multiple motors, two CPUs were connected using a dual-port RAMIDT70V25 on the F2812-1 mainboard, forming a symmetrical structure. Based on the current motor interface configuration on the board, each board can connect two fully closed-loop servo motors, and the F2812-2 mainboard can connect four fully closed-loop servo motors. [align=center] Figure 6. Block Diagram of F2812-2 Mainboard[/align] 3 Conclusion The S3C2410A and F2812 were selected as the embedded hardware research platform for motion control systems, forming a multi-CPU dual-layer controller structure. This structure can be used for motion control algorithm research in single MCU and DSP environments, as well as for research on complex motion control systems in multi-CPU parallel mode. The system is concise and reliable, conforming to the development direction of open, reconfigurable, and networked motion controllers. The innovation of this paper lies in designing and implementing an open, reconfigurable, multi-CPU motion controller hardware platform, which can be used for research on complex motion control systems, in response to the development trend of embedded motion controllers. References 1. General Administration of Quality Supervision, Inspection and Quarantine of the People's Republic of China, "Open CNC Systems Part 1: General Principles" (GB/T 18759.1-2002). China Standards Press. Beijing. 2002.10 2. Ma Honglian, Ding Nan, Lin Xiaohui. Design and Implementation of Flue Gas Sampling Control System Based on S3C2410. Microcomputer Information, 2006.11.107-109 3. You Liyan, Yin Sumin. High-speed motion controller based on DSP. Mechatronics, 2002.3.70-73.