Abstract: Fieldbus control systems are developing rapidly and have become the newest type of control system in the world. This paper implements the TCP/IP protocol on an MCU to form a field controller integrated with an embedded system. This enables embedded devices to easily access the Internet, reduces system construction costs, and represents an attempt to connect embedded devices to the Internet. This paper describes in detail the process of implementing the TCP/IP protocol in a fieldbus control system. Keywords: Embedded system, TCP/IP, Fieldbus 1 Introduction Fieldbus control systems are currently a hot topic in automation technology and are receiving increasing attention from automation equipment manufacturers and users both domestically and internationally. Fieldbus control systems use the open, interoperable network of fieldbus to interconnect various controllers and instruments in the field, forming a fieldbus control system. At the same time, control functions are completely decentralized to the field, reducing installation and maintenance costs. Therefore, FCS is essentially an open, interoperable, and thoroughly distributed control system, and is expected to become the mainstream product of control systems in the 21st century. When IP address allocation is no longer the main limitation for connecting embedded systems to the Internet, each field controller may need to connect different types of devices to the Internet for remote control or remote monitoring. 2 System Overall Design Framework This paper focuses on how to enable field controllers to communicate over the Internet. The method adopted is to utilize the system resources and processing power provided by the microprocessor, plus the ISA network card chip RTL8019AS, and implement a low-cost, reliable Internet-connected controller by writing a simplified TCP/IP protocol stack running on the microcontroller. After analyzing in detail the problems faced in connecting embedded systems to the Internet, a practical solution for embedded devices to access the Internet is proposed. The overall system design is shown in Figure 1. [align=center] Figure 1 Specific design diagram of field processing[/align] By placing the controller with TCP/IP protocol communication function in the field, this controller and even the entire system are connected to the network, and the entire field control system can be controlled via HTTP. 2.1 Network Interface Layer Design of Embedded System The network interface layer design involves hardware design issues and software issues, which correspond to the physical layer and logical link layer in the network protocol. 2.1.1 Physical Layer Design of Network Interface The physical layer design is directly related to the network medium. This section mainly discusses the IEEE 10-BASE-T twisted-pair cable, which is widely used in offices and buildings. The physical layer design of the network interface primarily focuses on designing a network interface conforming to the IEEE 80.23 standard used in local area networks. The physical interface is the interface connected to the twisted-pair cable, typically using an RJ-45 interface. It can use a total of 8 wires. In IEEE 10BASE-T, wires 1 and 2 are used for transmitting (TD+ and TD-), wires 3 and 6 for receiving (RD+ and RD-), and four wires are unused. It should be noted that there are many types of physical media used in networks; this section only considers the most commonly used twisted-pair cable scheme. Here, the design of the driver circuit and electrical isolation of the circuit must also be considered, for example, using YCL's 20F001N for electrical isolation. For other design issues of the physical layer and data link layer, since the network interface card (NIC) chip automatically supports them, when designing a scheme using a NIC chip, only the control of the NIC chip needs to be considered. This mainly includes the physical connection between the network card and the network cable, media access control (such as CSMA/CD), data frame assembly and disassembly, frame transmission and reception, error checking, data signal encoding/decoding (such as Manchester code and NRZ code conversion), and data serialization and parallelization conversion. To implement these functions, the network interface chip must be correctly configured. 2.1.2 Implementation of the Network Interface Layer The Ethernet protocol is automatically completed by the chip hardware, transparent to the programmer. The network card driver implements three functions: chip initialization, packet reception, and packet transmission. Depending on the data link, the RTL8019AS can be internally divided into two parts: a remote DMA channel and a local DMA channel. The local DMA completes the data exchange between the controller and the network cable; the main processor only needs to operate on the remote DMA to send and receive data. When the main processor wants to send data to the network, it first sends a frame of data to the transmit buffer in the RTL8019 client via the remote DMA channel, and then issues a transmission command. The RTL8019AS completes the transmission of the previous frame before completing the transmission of the current frame. The data received by the RTL8019AS is compared via MAC and checked via CRC, then stored in the receive buffer via RFO. Once a frame is full, the main processor is notified via an interrupt or register flag. The block diagram is shown in Figure 2. [align=center] Figure 2 RTL8019AS Interrupt Mode Working Principle Diagram[/align] 2.2 Driver Design First, let's introduce the basic information of the RTL8019AS: It has 32 input/output addresses with an address offset of 00H0-1FH. Of these, 16 addresses from 00H-0FH are register addresses. 8 addresses from 10H-17H are DMA addresses. 8 addresses from 18H-1FH are reset ports. The subroutine that performs network card initialization is: Network Card Chip Reset. It first sets the RSTDRV pin of the network card to 1, holds it for more than 100ms, and then lowers it, thus completing the reset of the RTL8019AS. After resetting, the network card's operating parameters need to be set, i.e., the network card chip's function registers need to be configured. Only after these settings are complete can the network card chip send and receive data. Software operation of the RTL8019AS has two modes: polling and interrupt. Because the microcontroller's processing speed is relatively slow, interrupt handling takes a considerable amount of time. If interrupts occur frequently, the microcontroller will not function properly. Therefore, a polling method is used to read data from the 8019. In polling mode, the main program uses the values ​​of the CURR and Boundary registers to determine whether a data frame has been received. When Boundary and CURR are not equal, it indicates that a new frame has been received in the receive buffer. After reading the data, the main program updates Boundary with the second byte of the read frame (the page address of the next frame). The main program continuously tracks CURR and Boundary to achieve data reception. When sending a data frame, the main program first checks the TSR register to determine if the previous frame has been completely sent. The program flowchart is shown in Figure 3. [align=center]Figure 3 RTL8019 Data Transmission and Reception Flowchart[/align] 3 Implementation of Embedded TCP/IP Protocol The complete TCP/IP protocol stack and its application layer relationship are shown in Figure 4 below. [align=center]Figure 4 TCP/IP Protocol Layers[/align] The function design of the network interface layer is related to the sending and receiving functions. Here, we introduce the implementation of data transmission using the TCP/IP protocol on the controller. The main protocols introduced include: IP protocol, ICMP protocol, ARP protocol, and TCP protocol. The first two fields in the Ethernet header are the source address and destination address of the Ethernet. The special address with all 1s in the destination address is the broadcast address, and all Ethernet interfaces on the cable must receive broadcast data frames; for ARP requests or responses, the frame type field has a value of 0x0806; the hardware type field indicates the type of hardware address, and its value of 1 indicates an Ethernet address; the protocol type field indicates the type of protocol address to be mapped, and its value of 0x0800 indicates a PI address; the hardware address length and protocol address length indicate the length of the hardware address and protocol address respectively, in bytes. For ARP requests or replies to IP addresses on Ethernet, their values ​​are 6 and 4 respectively; the Operation field indicates four operation types: ARP request (value 1), ARP reply (value 2), RARP request (value 3), and RARP reply (value 4). The protocol version number is 4; the header length refers to the number of 32-bit words in the header, and the value for a normal IP datagram (without any options) is 5. The Type of Service (TOS) field includes a 3-bit priority subfield (now ignored), a 4-bit TOS subfield, and 1 unused bit (must be set to 0). The 4-bit TOS represents: minimum latency, maximum throughput, highest reliability, and minimum cost. Only 1 of the 4 bits can be set. If all 4 bits are 0, it means a normal service; the total length field refers to the length of the entire IP datagram in bytes; the identifier field is used to uniquely identify each IP datagram sent by the host; of the 3 flags, the first bit is reserved (must be set to 0), the second bit is used to indicate that this IP datagram will not be fragmented, and the third bit is used to indicate that there are further packets; the following 13 bits, the fragment offset, refers to the position of the packet in the current datagram; the TTL (time-to-live) field sets the maximum number of routers the datagram can pass through, usually 32 or 64; the header checksum field is the checksum calculated based on the IP header, using the algorithm of row-binary summation; the last field is the options, which is a variable-length optional information in the datagram. TCP provides a connection-oriented, reliable byte stream delivery service. The structure of a TCP packet is shown in Figure 5. [align=center] Figure 5 Structure of a TCP packet[/align] Each TCP segment contains the source and destination port numbers, used to identify the sending and receiving application processes. These two values, along with the source and destination IP addresses in the IP header, uniquely identify a TCP connection. The sequence number identifies the stream of data bytes sent from the TCP sender to the TCP receiver. It represents the first data byte in this segment. The acknowledgment number contains the next sequence number that the sending end expects to receive. The header length gives the number of 32-bit words in the header. The urgent pointer is a positive offset, added to the value in the sequence number field to indicate the sequence number of the last byte of urgent data. The author's innovation: Implementing TCP/IP protocol communication is crucial for the controller to perform network communication. This paper details the process of implementing this protocol. First, it introduces the data communication format and the network interface layer design of the embedded system. Then, it describes the initialization program design for the RTL8019AS. Finally, it introduces how the embedded system communicates based on the TCP/IP protocol. References: [1] Wu Kuanming. Selected Applications of Fieldbus Technology [M]. Beijing: Beijing University of Aeronautics and Astronautics Press, 2003. [2] Douglas E Comer-David L Stevens. Internetworking with TCP/IP (Volume 1) [M]. Beijing: Electronic Industry Press, 1998. [3] Lin Wei, Huang Kang. Research on Embedded Network Communication Based on S3C44B0X [J]. Microcomputer Information, 2007, 8-2: 35-36 [4] Jiang Moqi, Lin Wei. Protel2004 Schematic and PCB Design Examples [M]. Machinery Industry Press, 2005. Author Information: Niu Rong (1974.04-), female (Han), from Huaiyang, Henan, lecturer, mainly engaged in computer teaching and research