Abstract: This paper designs a distributed measurement and control system based on RS485 serial bus. The system mainly consists of the following controller components: host computer, data acquisition module, and relay array module. RS-485, as a communication method with simple hardware design, convenient control, and low cost, realizes unified and coordinated communication of these modules, achieving a distributed measurement and control system with one master (PC) and multiple slaves (multiple PIC16F877 subsystems). Keywords: Measurement and control system; RS-485; Serial line Internet Protocol 1 Introduction RS-485 was developed by the Electronics Industry Association (EIA) in 1983. It has multi-point, bidirectional communication capabilities, allowing multiple transmitters to connect to the same bus, while increasing the transmitter's drive capability and conflict protection characteristics, and expanding the bus common-mode range. It was later named the TIA/EIA-485-A standard. RS-485 uses balanced transmission and differential reception, and has the ability to suppress common-mode interference. The electrical protocol for transmission specifies that when the voltage of line A is lower than that of line B, signal 1 is transmitted; when the voltage of line A is higher than that of line B, signal 0 is transmitted. Lines A and B can withstand common-mode signals from -7V to +12V. Common-mode signals refer to the voltage of line A or B relative to ground. A standard transmitter can directly drive several receivers, and the transmitter can be turned off to make its output high-impedance. Therefore, only two wires are needed to establish a half-duplex communication network. The RS-485 standard only specifies the electrical characteristics of the interface and does not involve connectors, cables, or protocols. Users can build their own higher-level communication protocols based on this. 2. Hardware Circuit and Communication Timing A simplified diagram of a single-master, multi-slave distributed control system composed of RS-485 is shown in Figure 1. [align=center] Figure 1 Structure diagram of RS-485 bus[/align] For asynchronous communication of microcontrollers, in addition to directly connecting the TX and RX terminals, unlike the RS-232 communication protocol, RS-485 requires one I/O pin of the microcontroller to control the direction of data reception or transmission. In the master-slave communication mode composed of RS-485 protocol, all communication is controlled by one master. All other slaves are normally in receive mode. Once a slave is called by the master, its communication state is changed to transmit mode. After the data is sent, it switches back to receive mode. The schematic diagram of the system hardware connection circuit is shown in Figure 2. [align=center] Figure 2 System hardware connection schematic diagram[/align] 2.1 Upper computer master control end Since the upper computer only has a traditional 9-pin D-type serial port, in order to form a data communication network with multiple lower computer nodes, it is necessary to convert the RS-232 communication protocol to the RS-485 protocol mode. One MAX232 and one MAX485 chip are needed. The circuit schematic diagram is shown in Figure 3. [align=center]Figure 3 RS-232 to RS-485 Level Conversion Diagram[/align] The RS-232 to RS-485 converter mainly consists of three parts: power supply, RS-232 level conversion, and RS-485 level conversion. The RS-232 level conversion circuit uses the commonly available MAX232 integrated circuit, while the RS-485 level conversion circuit uses the MAX485 integrated circuit. For ease of use, the power supply is designed as passive, with the entire circuit's power supply directly taken from the DTR (pin 4) and RTS (pin 7) of the PC's RS232 interface. Each line of the PC serial port can provide approximately 9mA of current, so the current provided by the two lines is sufficient for this circuit. Experiments have shown that this circuit can also function normally using only one line. When using this circuit, it is important to note that the PC program must ensure that the DTR and RTS outputs of the serial port are high. After voltage regulation by D3, VCC is obtained. Actual testing shows that the VCC voltage is approximately 4.7V. Therefore, the role of D3 in the circuit is voltage regulation and limiting. The MAX485 controls data input and output through two pins, RE (pin 2) and DE (pin 3). When RE is low, the MAX485 data input is valid; when DE is high, the MAX485 data output is valid. In half-duplex operation, these two pins can usually be directly connected, and the high or low level output from the PC or microcontroller can switch the MAX485 between receive and transmit states. Since DTR and RTS are used for circuit power supply in this circuit, the TX line, another channel of the MAX232, and Q1 are used to control the state switching of the MAX485. Normally, pin 9 of the MAX232 outputs a high level, which, after being inverted by Q1, makes RE and DE of the MAX485 low, putting it in data receive state. When the PC sends data, pin 9 of the MAX232 outputs a low level, which, after being inverted by Q1, makes RE and DE of the MAX485 high, putting it in data transmit state. 2.2 Lower-level slave terminal: The PIC16F877 microcontroller has a general-purpose synchronous/asynchronous receiver/transmitter (USART), also known as a serial communication interface (SCI). It can operate in full-duplex asynchronous mode and half-duplex synchronous mode. It is a two-wire serial communication interface that uses the RC6 and RC7 pins of the PORTC port as the transmit (TX) and receive (RX) pins of the serial communication interface, respectively. To configure the RC6 and RC7 pins of the PORTC port as the transmit (TX) and receive (RX) pins of the serial communication interface, respectively, bit 7 (SPEN) of the USART receive status and control register TCSTA and bit 7 of the TRISC register must be set to 1, and bit 6 of the TRISC register must be set to 0. To enable the USART to operate in receive or transmit mode, the corresponding status registers and control registers must be configured. The USART transmitter and receiver are functionally completely independent. To enable the USART to operate in asynchronous communication mode, they must use the same data format and baud rate. Here, a common format is used: baud rate 9600, no parity, 8 data bits, and 1 stop bit. When writing the program, the first step is to configure the operating mode and related registers of the USART asynchronous communication module. The main module registers are: TXSTA (data transmit control and status register), RCSTA (data receive control and status register), SPBRG (baud rate control register), INTCON, PIEI, PIRI (related interrupt control registers), TXREG (serial data transmit register), and TCTEG (serial data receive register). In the PIC microcontroller, only the BGRH bit in the SPBRG and TXSTA registers determines the USART communication baud rate; it does not occupy any other timer resources. The baud rate generator's clock is taken from the oscillation frequency output of the microcontroller's main oscillator. By setting the SPBRG register and the BGRH control bit, the oscillation frequency is divided to generate the desired baud rate value. When BRGH=0, it is a low-speed baud rate generation mode; BRGH=1 generates a high-speed baud rate. A high-speed baud rate is used here because it reduces the error compared to the standard baud rate value. The calculation method for the baud rate in asynchronous communication is as follows: If the operating oscillation frequency of the microcontroller is fosc, and the value of the SPBRG register is X, then the formula for calculating the high-speed baud rate is: (1) In the design process, we usually first select the baud rate to be obtained, and then calculate the setting value X of SPBRG, transform formula (1), and get: (2) Precautions for setting the baud rate in asynchronous communication: When using the standard baud rate, if you want to pursue the accuracy of the baud rate in one-step communication, then you should choose 11.0592MHz as the operating oscillation frequency of the microcontroller. But in fact, there is no need to be so concerned. Asynchronous communication allows for a certain deviation in the baud rate. As long as the deviation value is within ±3%, normal communication can be guaranteed. Therefore, for the commonly used baud rate setting of 1200bps～9600bps, there are many oscillation frequencies that can be selected. Users can choose the oscillation frequency according to the other functional requirements of their designed system. This makes the oscillation frequency of the microcontroller lower, the power consumption lower, and the system's anti-interference capability stronger. Furthermore, if the selected baud rate can be used in both low-speed and high-speed modes, the high-speed mode should be selected in the program as much as possible, so that the actual baud rate error is relatively small. 2.3 Communication Timing Since RS-485 communication is a half-duplex communication, sending and receiving share the same physical channel. Only one microcontroller is allowed to be in the transmitting state at any given time. Therefore, the responding microcontroller must hear that the call signal on the bus has been sent and that there is no response signal from other microcontrollers before it can respond. If the timing is not well coordinated, bus conflicts will occur, paralyzing the communication of the entire system and preventing it from working properly. How to transmit data between the host computer and the slave computer, how to improve the efficiency and reliability of communication, as well as the fault handling during the communication process and the frame format conventions, all require a detailed communication protocol. Since the RS-485 standard only specifies the physical layer electrical standard and does not specify the upper layer communication protocol, this provides designers with great flexibility. A complete communication protocol requires a simple structure, complete functions, expandability and compatibility, and standardization as much as possible. 3. Simple Protocol for Message Communication SLIP (Serial Line Internet Protocol) is a serial line Internet protocol, one of the earliest and only two serial IP protocols. It implements the function of running TCP/IP protocol and its application services on serial communication lines, providing users with dial-up IP mode for Internet access. Here are some improved protocols derived from it: (1) Message assembly when sending data ● Take a keyword 0x55. The transmission of a message is guided by 0x55. There can be any number of bytes in the middle. Finally, a message ends with 0xAA. The keywords 0x55 and 0xAA do not participate in the checksum calculation. ● If the original data being transmitted contains 0x55, it is replaced with 0xFF+0x05. When calculating the checksum, it is still calculated as one 0x55. ● If the original data being transmitted contains 0xAA, it is replaced with 0xFF+0x0A. When calculating the checksum, it is still calculated as one 0xAA. ● If the original data being transmitted contains 0xFF, it is replaced with 0xFF+0x00. The checksum is still calculated as a single 0xFF. ● The remaining data is sent as is. For example, when there are 5 bytes of data to be sent, such as 0x55, 0x5A, 0xAA, 0xAS, and 0xFF, their arithmetic checksum 0xFD is added, and the original data is a total of 6 bytes. A message integrated in the above way is: 0x55, 0xFF, 0x05, 0x5A, 0xFF, 0x0A, 0xAS, 0xFF, 0x00, 0xFD, 0xFF, a total of 11 bytes. (2) Message interpretation when receiving data The receiver will receive all the data and store it in an array. The main program will retrieve the data from the array one by one and interpret it. The process is as follows: ● Wait for the first 0x55 to appear to determine the start of a data packet. Once 0x55 is read, an initialization process for message reception is immediately initiated, including clearing array cells and byte counters. ● A data item is read from the queue. If it is not 0x55, 0xAA, or 0xFF, the data is directly stored in the array. ● If 0xFF is read, the next data item is read. If it is 0x05, the original data 0x55 is replaced; if it is 0x0A, the original data xAA is replaced; if it is 0x00, the original data 0xFF is replaced. If none of these apply, a data transmission error occurs. ● When xAA is read, a message ends, and the serial port receive interrupt is disabled. The serial port interrupt flowchart is shown in Figure 4. [align=center] Figure 4 Serial Port Interrupt Flowchart During Data Frame Reception[/align] 4 Conclusion The author's innovation: Among various solutions for medium-to-long-distance communication between multiple MCUs, RS-485 stands out due to its simple hardware design, convenient control, and low cost. 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