Abstract: A video acquisition system based on CMOS image sensor was designed. The hardware circuit and timing design of the system are described in detail. The system uses the IBIS5-A-1300 chip of FillFactort as the image acquisition chip and the EZ-USB FX2 chip of USB2.0 controller as the data acquisition chip to realize the real-time acquisition of image data. The experimental results show that the video acquisition system of the system has clear and reliable imaging and can well meet the requirements of video acquisition. Keywords: CMOS image sensor, timing block transmission, rolling shutter, synchronous shutter Introduction: CCD and CMOS image sensors are competitors in the field of solid image sensors. They have their own advantages and disadvantages in performance. Compared with CCD image sensors, CMOS image sensors have low power consumption, simple structure, high integration, small size and low cost, which greatly improves the portability and reliability of the products. Due to the internal structure of CMOS image sensors, they have high radiation resistance and strong anti-interference ability. Therefore, they have great application potential in image sensing, astronomical observation, small satellites, star sensors and other application fields[1]. In addition, based on the processing technology of CMOS image sensors, it is easier to manufacture large-area CMOS volume sensor devices, which further expands the application range of CMOS image sensors. The video acquisition system based on CMOS image sensors makes full use of the advantages of CMOS image sensors. It is powered by USB bus, plug and play, has simple circuit, low power consumption, small finished product size, clear and stable imaging, and well meets the image acquisition requirements of CMOS image acquisition system. I. Internal structure of CMOS image sensor Currently, CMOS image sensors are mainly divided into passive pixel sensors (PPS) and active pixel sensors (APS) [2]. PPS has a simple structure and high quantum efficiency, but its disadvantage is high noise and it is not conducive to the development of large arrays; APS adds at least one transistor in the pixel to realize signal amplification and buffering, which improves the noise problem of PPS, but worsens the consistency of threshold and gain, and also reduces the fill factor. The main pixel structures of CMOS image sensors are photodiode passive pixel structure, photodiode active pixel structure (see Figure 1) and grating active pixel structure. Other special structures include logarithmic transmission type, pinned photodiode type, floating gate amplifier type, etc. [align=center] Figure 1 Photodiode active pixel structure[/align] A typical CMOS image sensor usually includes: an image sensor core, corresponding timing logic and control circuit, AD converter, memory, timing pulse generator and decoder, etc. [3]. The timing control circuit is used to set the working mode of the sensor, generate working timing, control data output, etc. The signal acquired by the pixel is amplified, AD converted, stored and processed inside the chip. Finally, the required digital signal can be output, or the analog signal can be output, which provides users with greater flexibility in design [4]. II. Working principle of CMOS image and video acquisition system This video acquisition system can be divided into three parts according to its function: CMOS imaging part, CPLD timing control part, and USB transmission part. The working principle of the entire image acquisition system is as follows: The CPLD sends the correct timing signal to the CMOS image sensor, driving it to work normally, adopting an appropriate shutter mode, and packaging the acquired image data for processing. The data is then output to the USB transmission chip, which transmits the image data to the host computer, where the acquired image is obtained through the upper-layer application. III. Main Chips Used in the System 3.1 CMOS Image Sensor Chip IBIS5-A-1300. This system uses the Fillfactory IBIS5-A-1300 CMOS image sensor chip, with a resolution of 1280×1024, a maximum full-frame acquisition rate of 27fps, a maximum dynamic range of 100dB, 6.7m×6.7m high fill factor pixels (66% fill factor), and supports both rolling shutter and synchronous shutter modes. The internal integrated output amplifier with adjustable gain and bias, as well as a 40Msamples/s high-speed A/D conversion module, with an A/D quantization level of 10bit, can directly output analog or digital signals. It has a large number of registers and controllers, which can adjust the working state of the sensor in real time. The chip supports windowing technology and subsampling technology, and can increase the frame rate in real time according to actual needs [5]. 3.2 Data acquisition chip EZ-USB FX2 The USB transmission part uses the CYPRESS EZ-USB FX2 chip, which is a USB 2.0 integrated peripheral controller. The chip supports full-speed transmission of 12M/S and high-speed transmission of 480M/S. It can use (has) 4 USB transmission modes: control transmission, interrupt transmission, block transmission and synchronous transmission. The device integrates an enhanced 8051, 8.5kB RAM, 4kB FIFO memory, serial interface engine (SIE), general programmable interface (GPIF), I/O port, data bus and address bus [6]. 3.3 Altra's CPLD control chip EPM570. The timing control chip of the system adopts the EPM570 CPLD control chip from Atral. This chip can well fulfill the timing control requirements of the system. IV. CMOS Video Imaging System Design 4.1 System Hardware Implementation. This acquisition system is composed of two four-layer PCB boards, one of which is a video acquisition board and the other is a USB data transmission board. Its core CMOS video image acquisition board is shown in Figure 2. [align=center] Figure 2: Schematic diagram of CMOS video image acquisition board[/align] As can be seen from the schematic diagram of the hardware design, the CMOS image sensor only needs a small number of power conversion devices to work normally. This is because the CMOS image sensor has very low power consumption and can be driven normally using only the 5V voltage provided by the USB bus. In addition, the CMOS image sensor chip only needs a few external control signals to complete image acquisition (the control signals of this system are provided by the CPLD chip on the USB data transmission board), and the chip integrates an output amplifier and a digital-to-analog conversion module. Only by modifying the special register values ​​in the chip can the bias voltage, gain and other parameters of the output amplifier be changed. This greatly reduces the complexity of the hardware design and the size of the finished product, and has high application value. 4.2. System Timing Design. CMOS image sensors have a simple structure and high internal integration, thus requiring only a few external control signals to complete video image acquisition and output. This system's timing is designed using VHDL hardware description language, with its core being a finite state machine. The specific state relationships are as follows: The system operation process is as follows: After power-on, the CPLD generates a reset signal to reset the entire chip to its initial state. Then, parallel data injection is performed on the chip, writing predetermined values ​​to the special registers of the CMOS image sensor, setting parameters such as pixel integration time, number of pixel readout rows, and output amplifier gain. Subsequently, the CPLD provides the CMOS chip with the ss_start signal to start pixel integration, and the ss_stop signal to end pixel integration. The image sensor is then in a readable state. A y_start signal is sent to the CMOS to start reading one frame of image, and a y_clock signal is sent to start reading one line of image. When the CMOS image sensor has pixel signal output, the pxl_valid pin signal is high, indicating that the CMOS image sensor is outputting one line of image. When pxl_valid goes low, one line of image output ends, and the CPLD provides the next y_clock signal to start the CMOS for reading the next line of image. When the last line of a frame image begins to be read, the LAST_LINE pin of the CMOS chip goes high, marking the end of the reading of a frame image. The CPLD then generates the next ss_start signal to start reading the next frame image. In this way, the CMOS works normally under the timing control of the CPLD and reads images in a loop. The timing simulation waveform of the system image acquisition module is shown in Figure 4. [align=center] Figure 4: Timing simulation waveform of the system image acquisition module[/align] 4.3. Design of USB image acquisition module. The data acquisition module of this system adopts the EZ_USB FX2 USB transmission chip from Cypress. By writing firmware, the chip is made to work in high-speed batch transmission mode. This system adopts the SLAVE FIFO transmission mode in the chip [7], that is, without the control and intervention of the enhanced 8051 core in the USB chip, the data is directly transmitted to the PC through the USB bus at high speed. Finally, the upper-level user program is written using Visual C++ 6.0. Multi-threading technology is used to create two threads: USB transmission thread and real-time image display thread, which realizes real-time image display in the PC. V. Experimental Results The target images captured in the experiment demonstrate that the CMOS image sensor produces clear, stable, and high-resolution images. The entire CMOS video acquisition system has a simple structure, easy timing design, and a short development cycle. The finished product is small in size, requires few external components, and is low in cost. Powered by a USB bus, it is plug-and-play and has high practical value. The authors' innovation lies in proposing a video acquisition system based on a CMOS image sensor, unlike traditional CCD-based systems. The system uses a USB 2.0 data bus for data transmission and power supply, significantly reducing system size and power consumption. Due to the structural characteristics of the CMOS image sensor, it is highly suitable for large-area image acquisition and aerospace engineering applications. References: [1] You Zheng, Li Tao Application of CMOS Image Sensor in Space Technology Optical Technology 2002 No.1 [2] Jan Bogaerts, Bart Dierickx, Guy Meynants, and Dirk Uwaerts, Total Dose and Displacement Damage Effects in aRadiation-Hardened CMOS APS, IEEE Transactions on Electron Devices. VOL.50, NO.1, Jan, 2003 [3] Zhao Longbao, Fan Tianxiang, Lu Hengli Image Acquisition and Display System Based on OV5017 and CPLD Microcomputer Information 2005 No.7 [4] Chen Rongting, Peng Meigui Fundamentals and Applications of CCD/CMOS Image Sensor Beijing Science Press 2006 [5] IBIS5-A-1300 1.3M Pixel Dual Shuter Mode CMOS Image Sensor www.Fillfactory.com [6] EZ-USB Manual Technical Reference www.cypress.com [7] Qian Feng "EZ-USB FX2 Microcontroller Principles, Programming and Applications" Beijing: Beijing University of Aeronautics and Astronautics Press, 2006