1 Introduction Since Japanese scholars A. Nabae et al. proposed the three-level midpoint clamp structure at the IEEE Industrial Applications Conference in 1980, three-level inverters have become one of the main methods for speed regulation of large-capacity, medium- and high-voltage motors. Among the pulse width modulation (PWM) methods, which are the core technologies, the most important one is voltage space vector pulse width modulation (SVPWM) [1, 2]. The advantages of SVPWM are: good performance over a wide range of modulation ratios; no need for a large amount of angle data; high bus voltage utilization; clear physical concept; simple algorithm and suitable for digital schemes; suitable for real-time control [3]. Therefore, this control method is the most widely used in high-power frequency converter products at home and abroad, and it is also a hot topic in the research of three-level inverters. The generation of space vector is the key link of SVPWM. At present, chip manufacturers have developed dedicated DSP chips for two-level inverters, which can easily realize the space vector generation function of two-level inverters. Due to the increase in switching devices and the number of levels, the complexity of vector generation in multilevel inverters is much greater than that in two-level inverters. Currently, there is no dedicated DSP chip that supports vector generation in multilevel inverters. Therefore, finding a simple and universal method for generating space vectors for multilevel inverters is a concern for researchers. Reference [4] proposes an SVPWM optimization algorithm. This algorithm does not require complex calculations such as square root and arctangent. It only needs to convert the reference vector to a 60° coordinate system and then perform simple arithmetic operations to calculate the action time of each basic vector. Based on this, the author attempts to improve a three-level space vector pulse width modulation optimization control algorithm that is easy to implement with DSP, so that the originally complex vector generation becomes simpler. 2 Characteristics and basic principles of three-level inverters The so-called three-level inverter refers to an inverter where the output voltage of each phase on the AC side has three possible values ​​relative to the voltage on the DC side, namely the positive terminal voltage (+ed/2), the negative terminal voltage (-ed/2), and the neutral zero potential (0). The topology of the diode clamped three-level inverter is shown in Figure 1. [align=center]Figure 1. Diode-clamped three-level inverter[/align] It consists of 2 input capacitors, 12 switching transistors, 12 freewheeling diodes, and 6 clamping diodes. The two input capacitors, C1 and C2, share the input voltage ed, with each capacitor having a voltage of ed/2. Due to the clamping diodes, each switching transistor experiences a capacitor voltage of ed/2 when turned off. Therefore, the three-level inverter can significantly increase the input voltage without increasing the voltage rating of the components. Furthermore, according to the definition of a three-level inverter, each phase arm of the inverter has 4 main switching transistors with 3 different on/off combinations, corresponding to 3 different output potentials: +ed/2, 0, and -ed/2, represented by the symbols p, o, and n respectively. Taking phase a as an example, to ensure that each power device withstands ed/2 voltage in the off state, when the phase a state changes, it should transition through the neutral point potential of 0. That is, the potential of each phase can only transition to the adjacent potential, and jumps in the output potential are not allowed. In addition, there are strict requirements for the control pulses of the main switching devices to prevent short circuits in the same bridge arm. That is, the control pulses of t1 and t0, t2 and t4 are required to be mutually inverse, and each pair of main switching devices must follow the principle of disconnecting before turning on. In the three-level control system, each phase has three switching states: p, o, and n. For a three-phase symmetrical system, there are a total of 33 (27) switching states. Each switching state corresponds to a voltage space vector. Therefore, the voltage space vector of the three-level inverter consists of 27 different vectors, as shown in Figure 2. [align=center] Figure 2 Distribution diagram of the space voltage vector of the three-level inverter[/align] All space vectors in Figure 2 can be classified into zero vector, small vector (vertices of the inner hexagon), medium vector (midpoints of the sides of the outer hexagon) and large vector (vertices of the outer hexagon). The six large vectors divide the vector space into six sectors, a to f. In each sector, the vertices of the vectors contained therein form four small regions, resulting in a total of 24 small regions. A decoupling analysis of 27 spatial vectors from the abc coordinate system to the αβ coordinate system is performed: By calculating the vectors of these 27 vectors in the αβ coordinate plane, merging duplicate vectors reveals only 19 different vectors in the αβ coordinate system. To simplify the calculation, the magnitude of all bridge arm vectors is divided by ed/3. Further calculation shows that the α and β coordinates of each specific voltage vector in the αβ coordinate system are not integers, which is highly detrimental to real-time calculations using digital control. 3. Optimization Algorithm Analysis of Three-Level Inverter SVPWM Since the α and β coordinates of each specific voltage vector in the αβ coordinate system are not integers, we perform another coordinate transformation on the voltage vectors in the αβ coordinate system, aligning the g-axis with the α-axis, and rotating the h-axis counterclockwise by 60° to obtain the gh coordinate system. As shown in Figure 3, the basic space vector of the three-level voltage in sector a becomes (0,0), (1,0), (2,0), (0,1), (0,2), (1,1). In this way, the original space voltage vector can be represented by coordinates in the new coordinate system, where all coordinates are integer points, which is beneficial for the controller to perform online calculations. [align=center] Figure 3 Coordinate Transformation Diagram of the New Algorithm[/align] 3.1 Preprocessing of Basic Spatial Voltage Vector Figure 4 is the projection diagram of v[sub]ref[/sub]* in the new coordinate system. According to the projection of the reference voltage v[sub]ref[/sub]* on the g-axis and h-axis, respectively set as v[sub]g[/sub] and v[sub]h[/sub], it is easy to obtain: (v[sub]ref[/sub]* is the magnitude of the reference vector. The relationship between v[sub]ref[/sub]* and other coordinates can be obtained by the cosine theorem) [align=center] Figure 4 Projection Diagram of vref in the New Coordinate System[/align] 3.2 Region Judgment and Determination of the 3 Most Recent Basic Voltage Vectors After knowing the coordinates v[sub]g[/sub] and v[sub]h[/sub] of the reference vector in the gh coordinate system, it is easy to determine its triangular region and the 3 most recent basic voltage vectors according to the conditions in the appendix. 3.3 Calculating the Action Time of the Selected Basic Vectors Let the three neighboring basic vectors selected in the previous step be (g1, h1), (g2, h2), and (g3, h3), with corresponding action times t1, t2, and t3 respectively. Applying the selected basic vectors to the volt-second balance equations, the action times of the three basic voltage vectors can be calculated as follows: Since they differ from each other by only 0 or 1, the computational complexity of calculating the action time of the vectors relative to the αβ coordinate system is greatly simplified. 3.4 Sequence of Output Voltage Vectors After determining the basic voltage vectors for synthesis and the action time of each vector, the sequence of action of the three basic voltage vectors must also be determined. The following principles should be followed in this step: (1) In order to optimize the switching frequency, the switching vectors should be selected such that only one switching function changes each time the switching vector changes (i.e., only one phase output changes), thereby reducing switching losses; (2) For ease of control, the selection of switching vectors should be symmetrical in one switching cycle; the action time of the zero vector or equivalent zero vector should be equally divided. Taking sector a as an example, the space is divided into four triangular intervals. According to the aforementioned principles, and based on the voltage space vector modulation theory, the switching vectors should be symmetrical in one switching cycle, so that the output harmonics are minimized. Figure 5 is a vector allocation sequence diagram of sector a. The allocation of each voltage vector according to the cycle is represented by the three-phase switch status code. As shown in Figure 5, regardless of which small region (a1-a4) the reference voltage vector falls into, it is synthesized and replaced by the three nearest vectors. Among these, a pair of small vectors, such as onn/poo in a2, are considered the same vector, and the first and last vectors ooo serve as the link in the vector chain. [align=center]Figure 5 Voltage Vector Sequence in Region a[/align] The generation of the voltage vector allocation sequence for the other five sectors is similar to that of sector a, and will not be elaborated upon here due to space limitations. In practical implementation, the voltage vector allocation sequence for each region can be first created into a table and stored in the DSP. Then, the signal transmission can be achieved using a lookup table, and the DSP can implement the pulse output function. 4. Experimental Simulation The system is composed of a TMS320F2812 DSP and a circuit board with the DSP as its core. Here, the DSP mainly implements the system initialization and pulse output functions. The correctness of the above SVPWM algorithm is verified using MATLAB/Simulink simulation. The system simulation parameters are set as follows: a three-phase asynchronous squirrel-cage motor is selected, with rated power pn=4kW, rated line voltage un=400V, rated frequency fn=50Hz, rated speed ωr=1430r/min, stator resistance rs=1.405ω, rotor resistance rr=1.395ω, stator leakage inductance lsl=0.005839h, rotor leakage inductance lrl=0.005839h, stator-rotor mutual inductance lm=0.1722h, moment of inertia j=0.0131kgm2, number of pole pairs p=2, switching frequency f=10kHz, DC bus voltage vdc=600V, DC side capacitance c1=c2=1200μF, and flux linkage amplitude given |ψs＊|=0.8Wb. To verify the algorithm, the system's operating state is set as follows: at t=0s, the given speed ωr=100r/min＝10.4rad/s, no-load start; at t=0.3s, the sudden load torque tl=20n.m is applied, and the relevant waveforms are shown in Figures 6-8. [align=center] Figure 6 Phase voltage waveform Figure 7 Line voltage waveform Figure 8 Three-phase current waveform[/align] 5 Conclusion Taking a sector as an example, this paper discusses in detail the working principle and implementation method of voltage space vector modulation of a three-level inverter, and analyzes the control algorithm in detail. Simulation results prove that the scheme is simple and feasible. About the author (1984-): Female, currently pursuing a Master's degree in Electrical Engineering at Southwest Jiaotong University, majoring in multilevel inverter technology and applications. References [1] Nabae A, Takahashi I, Akagi H. A new neutral-point-clamped PWM inverter. IEEE Transactions on Industry Applications, 1981, 17 (5): 518-523 [2] Yan Ganggui, Mu Gang, Huang Yafeng et al. PWM control method for stacked floating capacitor inverter. Power Electronics Technology, 2005, 39 (5): 47-50 [3] Xie Mingjing. A new three-level SVPWM control strategy. Master's thesis. Xi'an University of Technology, 2006 [4] Zhang Gang, Liu Zhigang, Diao Lijun et al. Research on SVPWM optimization algorithm of three-level PWM converter. Power Electronics, 2007, 26 (6): 53-55 [5] Song Wenxiang, Chen Guocheng, Wu Hui et al. Research on space vector modulation method of three-level voltage inverter. Variable Frequency Drive World, 2005(12):45-49 [6] Li Chunyan. Research on digital control of power supply based on DSP. Master's thesis. Nanjing University of Aeronautics and Astronautics, 2004