Abstract: This paper combines the advantages of LonWorks fieldbus ShortStack technology and development based on the μcos_Ⅱ operating system embedded on the MSP430F149 chip, applying it to the LON control network of multi-purpose intelligent nodes. The application program was ported to the target platform. Furthermore, the basic methods of this embedded system development were analyzed. Keywords: ShortStack; multi-purpose intelligent node; MSP430F149 1 Introduction LonWorks fieldbus, launched by Echelon Systems, Inc., is a local operating network with excellent performance characteristics such as uniformity, openness, interoperability, and support for multiple communication media, making it one of the most popular fieldbuses today. However, due to the relatively weak application processing power of the core Neuron chip of LonWorks control nodes, a master-slave processor structure is often used for complex applications. The master processor completes the user's application functions, while the Neuron chip serves as a communication coprocessor. Since this improves the node's processing power and saves money and development time, multi-functional general-purpose embedded master processors have a promising application prospect. The MSP430F149 main processor used in this paper is a highly integrated chip from TI, which simplifies the hardware design of the application system and is suitable as a multi-purpose intelligent node. 2 Introduction and Implementation of ShortStack 2.1 ShortStack Structure The ShortStack microserver is a development package provided by Echelon, and its structure diagram is as follows: [align=center] Figure 1 ShortStack Structure Diagram[/align] As can be seen from the figure, the main processor communicates with the ShortStack microserver through the ShortStack API functions, typically using five of them: lonInit(), lonEventHandler(), lonPropagateNv(), lonPollNv(), and lonsendServicePin(). The ShortStack Micro Server runs the ShortStack firmware and runs layers 1 to 6 of the LonTalk protocol; the main processor runs the SCI serial port driver, runs the ShortStack API functions, and handles communication with other Lonworks nodes; the main processor application calls the ShortStack API functions. The interface support file for the master processor device is generated by the Neuron C model file using the ShortStack wizard, producing data tables that define network variables and transceiver parameters. The model file only needs to declare network variables (NVs), configuration attributes (CPs), and functional modules (FBs), therefore, familiarity with Neuron C is not required. The serial driver provides an independent interface between the master and slave processors. The entire serial driver consists of two parts: the upper-layer driver provides an interface for the master application; the lower-layer driver handles the hardware interface with the neuron chip. Data exchange between the upper and lower layers is accomplished through a buffer queue. Communication between the lower-layer driver and the slave processor includes two types: SCI upload and SCI download. SCI upload is when data is uploaded from the neuron chip to the master processor; SCI download is when data is downloaded from the master processor to the neuron chip. 2.2 The software implementation of ShortStack is modified from the provided Neuron C template example. The main modifications are to the statements related to the MSP430F149 processor in ldvsci.h and ldvsci.c. In ldvsci.h, modify as follows: #define ENABLE_RX_TX() (ME1 |= UTXE0+URXE0) #define ENABLE_TX_ISR() (IE1 |= 0x80) #define ENABLE_TX_COMPLETE_ISR() (IFG1|=0x80) //USART0 transmit flag #define ENABLE_RX_ISR() (IE1|= 0x40) //enable SCI receive interrupt #define DISABLE_TX_ISR() (IE1 &= ~0x80) #define DISABLE_TX_COMPLETE_ISR() (IFG1 &= ~0x80) //USART0 transmit flag reset #define DISABLE_RX_ISR() (IE1 &= ~0x40) #define CHECK_RTS() (P2OUT& 0x02) // check RTS #define CHECK_CTS() (P2IN& 0x01) // check CTS #define ASSERT_RTS() (P2OUT &= ~0x02) // assert RTS #define DEASSERT_RTS() (P2OUT|= 0x01) // deassert RTS #define DEASSERT_HRDY() (P2OUT |= 0x04) // deassert _HRDY #define ASSERT_HRDY () (P2OUT &= ~0x04) // assert _HRDY In ldvsci.h, modified void SysResetSCI (void), void SysInit (void), void SysUpdateWDT (void), @interrupt void RxInt (void) and @interrupt void TxInt The (void) contains programs related to the MSP430F149. Other files have been slightly modified; platform.h defines the difference between BIG_ENDIAN and LITTLE_ENDIAN, corresponding to the Harvard architecture and the von Neumann architecture. Since the MSP430F149 core uses the von Neumann architecture, ShortStack must use LITTLE_ENDIAN (i.e., the high byte is at the high address). 2.3 ShortStack Hardware Implementation: The processor (as shown in Figure 2) uses a TP/FT-10F control module. This module consists of a micro-circuit board and includes a 3150 chip, a flash memory, a communication transceiver, a power connector, I/O ports, and a network interface. IO_0 to IO_10 are the 11 I/O pins of the neural network chip 3150 used for connecting to control devices. DataA and DataB are the connection ports between the FTT-10 transceiver and the network. It can send data processed by the main processor to the LON bus and can also transmit messages from the LON bus to the main processor. Communication between the main processor and the neural network chip uses SCI mode. The SCI interface is a half-duplex serial asynchronous communication interface with a communication format of one start bit, eight data bits, and one stop bit (LSB first). The communication mode selection is determined by IO3; grounding IO3 selects the SCI communication mode. IO5 and IO6 are used to select the communication rate. 3. Porting μcos_II: The complete source code of μcos_II, totaling 16 files. The source files involved in the porting work are divided into three parts: the processor-independent code part, which implements the basic functions of the operating system, including 10 files: OS_CORE.C, OS_MBOX.C, OS_MEM.C, OS_Q.C, OS_SEM.C, OS_TASK.C, OS_TIME.C, OS_FLAG.C, OS MUTEX.C, and uCOS_II.H; and the setup code part, including the two header files OS_CFG.H and INCLUDES.H, used for operating system configuration. [align=center]Figure 2 Master-Slave Processor Connection Diagram[/align] The most important part is the processor-related code, including a header file OS_CPU.H, a C code file OS_CPU_C.C, and an assembly file OS_CPU_A.ASM. Porting this to the MSP430F149 processor requires modifying these three architecture-related files, totaling approximately 500 lines of code. The porting of these three files is described below. OS_CPU.H includes data type definitions, stack unit definitions, stack growth direction definitions, macro definitions for disabling and enabling interrupts, and macro definitions for task switching. To ensure that calling the system's low-level interface functions in different operating modes is not restricted by access permissions, the soft interrupt SWI is used. The stack unit is consistent with the CPU register length, and the structure constant OS_STK_GROWTH is set to 1, indicating that the stack grows from high address to low address. OS_CPU_C.C requires writing six simple C functions: OSTaskSiklnit(); OSTaskCreateHook(); OSTaskDelHook(); OSTaskSwHook(); OSTaskStatHook(); OSTimeTickHook(). The only required function is OSTaskStklnit(); the other five functions must be declared but not necessarily included. For OSTaskStklnit(), OSTaskCreate() and OSTaskCreateExt() initialize the task's stack structure by calling OSTaskStkInit(). OSTaskStkInit() returns the address pointed to by the stack pointer, and OSTaskCreate() obtains this address and saves it to the Task Control Block (OS TCB). CPU_A.ASM requires writing four simple assembly language functions: OSStartHighRdy(); OSCtxSw(); OSIntCtxSw(); OSTickISR(). All processor-related code should be placed in the OS_CPU_C.C file instead of in some scattered assembly language files. (1) OSStartHighRdy(): The high-priority ready task function OSStartHighRdy() must call OSTaskSwHook(), because OSTaskSwHook() can determine whether it is OSStartHighRdy() calling it (OSRunning is FALSE) or a normal task switch calling it (OSRunning is TRUE) by checking OSRunning. OSStartHighRdy() must also set OSRunning to TRUE before the highest priority task resumes and after calling OSTaskSwHook(). (2) OSCtxSw(), OSIntCtxSw(): The context switching function task-level switching is accomplished by sending a soft interrupt command, where the interrupt vector address must point to OSCtxSw(). Interrupt-level switching is performed by OSIntExit() by calling OSintCtxSw(). (3) OSTickISR(): The timer interrupt function OSTickISR() is mainly responsible for saving the contents of the processor registers when entering an interrupt, restoring the contents of the processor registers and returning when exiting the task switch. It is equivalent to the entry point of the interrupt service routine. 4 Combination of μc/os_Ⅱ and ShortStack Because of the inherent characteristics of the μc/os_Ⅱ embedded operating system code and the ShortStack application code, the two can be organically combined. μcos_Ⅱ has system services, such as mailboxes, memory management, message queues, semaphore management, etc. These services are defined in OS_CFG.h. When the designed system needs to use these services, it only needs to change the defined value to 1. Put all the constant definitions in the ShortStack application in OS_CFG.h. In this way, the various service functions of the operating system and the API and APP functions of ShortStack can be reduced at the same time. Run the ShortStack application as a task of the μcos_Ⅱ operating system. First, define a stack to save the current values ​​of the microcontroller's registers when the task is switched. When μcos_Ⅱ is scheduled to run the task again, the CPU values ​​can be restored from the stack, so that the task can continue to run. The program is as follows: OS_STK TaskStartStk[TASK_STK_SIZE]; //Task stack of Task1 OS_STK ShortStackStk[TASK_STK_SIZE]; //Task stack of ShortStack... //Other task stacks Void main(void) { OSInit(); OSTaskCreat(Task1, (void *)0, &TaskStartStk[TASK_STK_SIZE-1], 0); OSTaskCreat(ShortStack, (void *)0, &ShortStackStk[0], 2); ... //Create other tasks OSStart(); return 0; } void ShortStack(void) { lonInit(); for (; ; ) { lonEventHandler(); //Periodic call to check if there are any LonWorks events to handle } } Since the μc/os_Ⅱ operating system does not have any hardware drivers, users need to extend the ShortStack serial port driver and input/output queue operation parts into the operating system themselves. In addition, the system can add other specific tasks, and through system scheduling, it can achieve reasonable utilization of nodes and increase node usability. See Figure 3. Finally, the MSP430F149 chip with the TP/FT-10F control module is connected to the Gizmo4 development board, compiled using the Nodebuilder development tool, and the debugging interface is entered. A two-node network is connected using LonMaker to test whether the two nodes can communicate. [align=center] Figure 3 Software Structure Diagram[/align] 5 Conclusion The MSP430F149 is a 16-bit RISC microprocessor. This processor is particularly suitable for handheld devices and cost-effective, low-power network devices. It integrates rich resources such as interrupt control, power control, memory control, UART, PWM, and ADC. Due to the demands of industrial and home networking, and the convenient networking methods of the LonWorks bus, this multi-purpose intelligent node can be decentralized and self-manufactured. Each node addresses its specific tasks in a decentralized manner, while simultaneously facilitating information transmission between nodes through point-to-point and point-to-multipoint communication, achieving integration based on decentralization. For the host computer to monitor and manage the LON network, dynamic data exchange between the two is essential. LON bus technology also provides DDE Server software. DDE Server enables the exchange of network variables and information between the LON network and any Windows application with DDE functionality. The system provides a user-friendly interface, allowing users to configure the real-time operation status of each node, view historical operation records, and print data via the host computer. The author's innovation lies in designing a general-purpose node using ShortStack technology, with the MSP149 as the main processor and the Neuron chip as the microprocessor. This node communicates with the LonWorks bus and can be expanded for various applications, demonstrating significant practical and economic value. References [1] David E. Simon, translated by Chen Xiangqun et al., Embedded System Software Tutorial [M]. Beijing: Machinery Industry Press, 2005 [2] ShortStack User's Guide, Echelon, 2002 [3] Jean J. Labrosse, translated by Shao Beibei, μC/OS_II Source Code Open Real-Time Embedded Operating System [M]. Beijing: China Electric Power Press, 2001 [4] Hu Dake MSP430 Series FLASH Ultra-Low Power 16-bit Microcontroller [M]. Beijing: Beijing University of Aeronautics and Astronautics Press, 2001 [5] Jia Huixiao, Wang Zhenchen. High-Performance Temperature and Humidity Measurement and Control System Based on LonWorks [J]. Microcomputer Information, 2006, 8-1: 30-34.