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Design of Intelligent Nodes in a Distributed Control Network Based on CAN Bus

2026-04-06 07:38:27 · · #1
Abstract: Fieldbus is currently a hot topic in automation technology development. This paper introduces the design method of a distributed control network system based on CAN bus, and presents the hardware circuits and software initialization programs for two typical CAN bus intelligent nodes: Intel 80C196KC+SJA1000 and PIC16F877+MCP2510. Keywords: Field control network, CAN bus, SJA1000, MCP2510 1 Introduction Industrial field control involves a large number of sensors, electronic control units, actuators, etc., which are usually widely distributed and have high requirements for real-time performance and speed. How to connect them to form a distributed control network system is an important development direction of modern control systems. Fieldbus control system (FCS) is a typical implementation of such a control network structure. Controller Area Network (CAN) belongs to the fieldbus category. It is a multi-master serial bus that effectively supports distributed or real-time control, and is favored for interconnecting field devices due to its short message frames and excellent CSMA/BA bit-by-bit arbitration protocol. 2. Distributed Control Network System [align=center] Figure 1. Distributed Control Network System [/align] The distributed control network system based on CAN bus is shown in Figure 1. It adopts a fieldbus-based distributed control system (FDCS) structure, consisting of operator stations, intelligent nodes, and a CAN field control network. The operator station mainly completes online system monitoring, while multiple intelligent nodes independently complete data acquisition, system settings, operation display control, etc. Various data and management control information are exchanged between the operator station and intelligent nodes through the CAN fieldbus. 3. Intelligent Node Hardware Circuit Design This paper introduces the design of two typical CAN bus system intelligent nodes using Intel 80C196KC+SJA1000 and PIC16F877+MCP2510. The hardware circuit of the 80C196KC+SJA1000 intelligent node is shown in Figure 2. The circuit mainly consists of four parts: microcontroller 80C196KC, independent CAN communication controller SJA1000, CAN bus transceiver 82C250, and high-speed optocoupler 6N137. The 80C196KC microprocessor is responsible for initializing the SJA1000 and controlling it to perform communication tasks such as data reception and transmission. The SJA1000 is a replacement for the PHILIP PCA82C200 independent CAN controller, offering both Basic CAN and Peli CAN operating modes. The AD0-AD7 pins of the SJA1000 are connected to the P3 port of the 80C196, i.e., the data bus. The three highest bits of the 80C196 address bus are connected to the /CS pin of the SJA1000 via a decoder; the CPU can perform corresponding read and write operations on the SJA1000 using these addresses. The /RD, /WR, and ALE pins of the SJA1000 are connected to the corresponding pins of the 80C196, and /INT is connected to the INT external interrupt pin of the 80C196, allowing the 80C196 to also access the SJA1000 via interrupts. In this node, the SJA1000 is connected to the 80C196 via a parallel port, resulting in fast data read/write speeds and simple software programming. However, it occupies many I/O ports, making the hardware relatively complex. [align=center] Figure 2: 80C196+SJA1000 Smart Node Hardware Circuit[/align] To enhance the anti-interference capability of the CAN bus node, the TX0 and RX0 of the SJA1000 are connected to the 82C250 via a high-speed optocoupler 6N137, thus effectively achieving electrical isolation between CAN nodes on the bus. Complete power isolation can be achieved using a low-power power isolation module or a switching power supply module with multiple 5V isolated outputs. While these components increase the complexity of the node's program, they improve the node's stability and safety. [align=center] Figure 3: 16F877+MCP2510 Smart Node Hardware Circuit[/align] The smart node hardware circuit based on the PIC16F877 microcontroller is shown in Figure 3. If optocoupler isolation is required, the method shown in Figure 2 can be used. The MCP2510 is an independent CAN controller with a serial peripheral interface (SPI). It supports the CAN technology specification V2.0A/B and can send and receive standard and extended information frames. It also features receive filtering and information management functions. The MCP2510 transmits data with the MCU via the SPI interface, with a maximum data transmission rate of 5Mb/s. It uses few I/O ports and has a simple hardware interface. The MCU can communicate with other MCU units on the CAN bus through the MCP2510. The MCP2510 has five operating modes: configuration, normal, sleep, listen, and feedback. It contains three transmit buffers and two receive buffers, and also has flexible interrupt management capabilities. These features make MCU operation of the CAN bus very simple. The software design of the CAN bus node mainly includes three parts: CAN node initialization, message transmission, and message reception. The initialization program design is crucial for the normal operation of the CAN bus node. It mainly includes setting the operating mode, clock output register, receive mask register and receive code register, bus timer, output control register, and interrupt enable register. The hardware and software designs described in this paper have been applied in related research projects. 4.1 SJA1000 Initialization Subroutine The 80C196KC microcontroller initializes the SJA1000 via a parallel data bus. The following is the MCS-196 assembly source code for SJA1000 initialization. In the program, register symbols represent the addresses of the off-chip memory occupied by the corresponding SJA1000 registers. These symbols can be defined using the pseudo-instruction EQU at the beginning of the program. This will not be further elaborated upon later. init_SJA1000: LDB AL, #00000001B ; Enter reset mode and perform initialization STB AL, CR LDB AL, #00001000B ; Select Basic CAN, STB AL, CDR ; Disable clock output (CLKOUT) LDB AL, #00011011B ; Enable overflow, STB AL, CR ; Error, receive interrupt LDB AL, #00000000B ; Receive code register, ID is 0 STB AL, RXCODE LDB AL, #11111111B ; Receive mask register STB AL, RXMASK LDB AL, #00110001B ; Bus timing 0 STB AL, BUS_T0 LDB AL, #11011000B ; Bus timing 1, at 16MHz, STB AL, BUS_T1 ; Baud rate is 10kbps LDB AL, #0AAH ; Output control register STB AL, OUTCON LDB AL, #00001100B ; Clear data overflow, STB AL, CMR ; Release receive buffer LDB AL, #00011010B ; Return to working mode STB AL, CR RET 4.2 MCP2510 initialization subroutine [align=center] Figure 4 MCP2510 read and write timing diagram[/align] The PIC16F877 microcontroller is connected to the MCP2510 through the SPI interface. The SPI read and write timing of the MCP2510 is shown in Figure 4. Figure a is the SPI write timing diagram. The write instruction is first sent to the SI pin of the MCP2510, and each data bit is latched on the rising edge of SCK. Then the address and data are sent. After the instruction is executed, the data is written into the specified address unit. Figure b shows the SPI read timing diagram. First, the read command and address are sent to the SI pin of the MCP2510, and each data bit is latched on the rising edge of SCK. Then, the data stored in this address unit is output to the SO pin on the falling edge of SCK. During read and write operations, the CS pin should always be held low. The PIC16F877 microcontroller initializes the MCP2510 via the SPI port. The PIC assembly source code for MCP2510 initialization is provided below. The WRITE2510 subroutine writes data into the specified address unit according to the SPI write timing diagram in Figure 4. MCP2510_init CALL RESET ; System reset, configuration mode MOVLW CNF1 ; Bus timing MOVWF ADDR MOVLW B'00110001' MOVWF DATA1 CALL WRITE2510 ; Write data MOVLW CNF2 MOVWF ADDR MOVLW B'11110001' MOVWF DATA1 CALL WRITE2510 MOVLW CNF3 MOVWF ADDR MOVLW B'00000101' MOVWF DATA1 CALL WRITE2510 MOVLW RXM0SIDH ; Initialize receive mask register 0 MOVWF ADDR MOVLW B'11111111' MOVWF DATA1 CALL WRITE2510 MOVLW RXM0SIDL MOVWF ADDR MOVLW B'00000000' MOVWF DATA1 CALL WRITE2510 MOVLW RXM0EID8 MOVWF ADDR MOVLW B'00000000' MOVWF DATA1 CALL WRITE2510 MOVLW RXM0EID0 MOVWF ADDR MOVLW B'00000000' MOVWF DATA1 CALL WRITE2510 : ; Initialize receive mask register 1 : ; and receive filter registers 0~5 : ; MOVLW CANINTE ; Enable ERR, RX0 interrupt MOVWF ADDR MOVLW B'00100001' MOVWF DATA1 CALL WRITE2510 MOVLW CANINTF ; Clear interrupt flag MOVWF ADDR MOVLW B'00000000' MOVWF DATA1 CALL WRITE2510 MOVLW CANCTRL ; Normal working mode MOVWF ADDR MOVLW B'11100000' MOVWF MARK MOVLW B'00000000' MOVWF DATA1 CALL Bit_Modify2510 RETURN References 1 PHILIPS SJA1000 stand-alone CAN controller product specification. 2000 Jan 04 2 MICROCHIP MCP2510 Stand-Alone CAN Controller with SPITM Interface. 3 Wu Kuanming. CAN Bus Principles and Application System Design. Beijing University of Aeronautics and Astronautics Press, 1996.
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