1. Introduction Distributed control systems (DCS) are expensive automation control devices. While domestic and international DCS manufacturers produce large-scale DCS systems, they also offer smaller versions, but these remain prohibitively expensive for small businesses in China. Based on the actual situation of small and medium-sized enterprises in China, we propose a simplified, economical, and practical DCS system using a personal computer as the operator station and multiple DCS basic controllers via an RS-485 bus. 2. System Composition and Block Diagram The entire system consists of one PC or IPC as the operator station for configuration and real-time monitoring, and multiple DCS basic controllers (up to 32) for field control. Communication between the operator station and the basic controllers uses the RS-485 bus standard. The system structure is shown in Figure 1. The operator station can be an industrial PC with an RS-485 serial communication interface, or a general PC, but an RS-232/RS-485 interface converter must be added to the RS-232 interface. We use Atronix's ADC-106 interface converter to convert the RS-232C serial port's data transmit (TD) and data receive (RD) signals into two-wire balanced half-duplex RS-485 signals. Each controller is also equipped with a corresponding RS-485 interface, and we use MAXIM's MAX485 transceiver. Figure 1. System Structure Diagram 3. System Communication 3.1 Hardware Composition of the Communication Network 3.1.1 Introduction to RS-485 and System Connection Diagram The entire system uses the RS-485 bus standard for data transmission. The RS-485 bus is fast (maximum 10MB/s), has a long transmission distance (1200 meters at 90KB/s), transmits signals in a differential balanced manner, and has strong anti-common-mode interference capability, allowing one transmitter on a pair of twisted pairs to drive multiple load devices. Therefore, this bus standard is generally used for data transmission in industrial field control systems. Each node in the communication network has an RS-485 serial communication interface. A matching resistor is connected at the end of the bus to absorb reflected signals on the bus, ensuring that the normal transmission signal is clean and free of glitches. The matching resistor value should be equivalent to the characteristic impedance of the bus (120 ohms). The specific connection of the entire communication system is shown in Figure 2. Figure 2 Communication Network Connection Diagram 3.1.2 Introduction to ADC-106 Interface Converter This converter can be directly inserted into a standard DB9 pin RS-232C serial port and powered from its TXD, DTR, and RTS signals. The power supply signal level should be greater than +5V. The RS-485 interface is connected through a self-made DB9 connector. 3.1.3 Introduction to MAX485 Transceiver The network interface of the basic controller uses the MAXIM half-duplex 485 bus transceiver MAX485. Its control is very simple. RE is the receive control terminal, and DE is the transmit control terminal. One output port P1.0 of the 80C196KC is connected to the two control terminals. Normally, P1.0 is set low to put the controller serial port in listening mode. When data needs to be sent, P1.0 is set high. The network connection of the transceiver is shown in Figure 3. Figure 3. MAX485 Connection Diagram 3.2 Network Communication Protocol The PC and each slave device implement a strict broadcast-style master-slave communication method. Slave devices do not actively send commands or data; everything is controlled by the master. Communication between slave devices cannot be direct and must be relayed by the master. The data communication baud rate is 9600 b/s. Each controller has a unique address number, which uniquely identifies each controller. The frame format is 8 data bits, no parity bit, and 1 stop bit. The data format uses data packets, as follows: The PC (or IPC) broadcasts the requested slave device address through the RS-485 network. All slave devices listen to the broadcast and record the broadcast address. Each slave device compares the received address with its own address. The slave device with the same address is selected, and the remaining slave devices are unselected and temporarily isolated from the network. Only the master and the selected slave device remain on the network, communicating according to the master-slave dual-machine communication process. The lower-level machine communication process is as follows: Figure 4 Lower-level machine communication flowchart 4 Design and function of the basic controller The basic controller is the core of the control software and hardware. Its design directly affects the availability, real-time performance, and reliability of the system. To meet the requirements of high real-time performance and large data processing volume, the Intel 80C196KC 16-bit microcontroller is selected as the CPU of the controller. The entire controller adopts a dual-CPU structure: one CPU is responsible for data acquisition and real-time control, and the other CPU is responsible for data communication. Data exchange between them is through a dual-port RAM (IDT7132). The entire controller has 8 analog input channels, 6 analog output channels (two of which are PWM outputs), 16 digital inputs, 16 digital outputs, and 2 pulse inputs. Its structure is shown in Figure 5: The main control CPU is responsible for data acquisition and signal processing, and receives the configuration program sent by the host computer for field control. Because the entire configuration program is downloaded from the host computer to the controller's RAM for execution, the control is very flexible. In addition to basic control, the main control CPU can also perform advanced control algorithms. In addition, it has online control parameter adjustment function and multiple alarm functions. The main functions of the communication CPU are: 1. To complete the conversion between serial and parallel digital codes. 2. To send local information, identify the local address and receive communication data in serial communication mode. 3. To add a check segment to the transmitted data and check the check segment of the received data. 4. To use the address decoding ROM to translate the destination address of the high-speed data channel and the destination address of the memory into the corresponding internal memory address. 5. To complete the internal data transmission by issuing an interrupt to the main CPU and to generate read/write pulses, address and each data bit. 6. To match the data channel level with the internal TTL level. Figure 5 Controller structure block diagram 5 Conclusion Through the above discussion, it can be seen that the whole system has the following characteristics: 1) Low system construction cost and convenient connection. 2) The use of dual INTEL 80C196KC microcontrollers to collaboratively process control tasks results in stronger functions and faster speed. 3) The unified addressing method of 80C196KC facilitates the download of configuration programs, making the control more flexible and reliable. 4) It has a WDT circuit independent of the CPU—MAX705, which monitors the CPU's program operation and can also handle the power fluctuations of the controller. References [1] Xie Jianying. Microcomputer Control Technology. Beijing: National Defense Industry Press, 1990. [2] Wang Changli, Luo An. Selection and Application of Distributed Control Systems. Beijing: Tsinghua University Press, 1992. [3] Sun Hanfang. Intel 16-bit Microcontroller. Beijing University of Aeronautics and Astronautics Press, 1998. [4] Guo Moufa, Wang Shaobo. Design of RS-485 Network and Its Application in Industrial Monitoring System. Journal of Fuzhou University, No.1 Vol.27 1999. [5] RS-422 and RS-485 Application Note. B&B ELECTRONICS MANUFACTURING COMPANY, 1997.