In recent years, with the rapid development of embedded systems and the increasing requirements for hardware reliability, especially the development of network motion control systems with multiple motion control cards, new requirements have been put forward for motion control cards. The motion control card should have a CompactPCI bus interface with hot-swappable function. In such a motion control system, with the use of highly reliable embedded system software, the host computer only needs to implement overall control and management of the controlled object; while the acquisition of position feedback signals, the calculation of closed-loop control and the output of control quantities can all be completed by the motion control card with DSP as the core, which greatly improves the calculation speed and control response speed. Through the connection between the host and host computers with the CompactPCI bus interface with hot-swappable function, the system has higher reliability and the ability to replace faulty boards while powered on. 1 Overview of CompactPCI interface bus The CompactPCI interface bus defines a more robust and durable version of PCI. In terms of electrical, logic and software, it is fully compatible with the PCI standard. The CompactPCI interface card is mounted on a bracket and uses the standard Eurocard form factor. Although CompactPCI and standard PCI belong to the same standard, they are still very different. CompactPCI has many advantages over PCI: (1) It has better mechanical characteristics. It enhances the maintainability and reliability of the PCI system in telecommunications or other harsh industrial environments. (2) It adopts Eurocard packaging, and the airflow in the system is uniform. (3) The power and signal leads of the CompactPCI connector support hot-plug specifications, which is very important for fault-tolerant systems and is a function that standard PCI cannot achieve. (4) The bus is easy to expand and can support up to 256 standard PCI bus devices at the same time. (5) The connector pins of the CompactPCI backplane are divided into long pins, medium-long pins and short pins. Long pins are some power pins, the shortest pin is BD-SEL#, and other bus signals and some power signals are medium-long pins. The connector slot J1 has long pin, medium-long pin and short pin pins, while the J2 slot is all medium-long pin pins. 2 Overview of the system hardware structure The open four-axis DSP motion control card drives four servo motors through a 12-bit DAC and communicates with the host through the CompactPCI bus backplane connector. The DSP processor and CompactPCI interface utilize PLX's PCI9030 interface chip for communication with the dual-port RAM buffer. The PCI9030 is the industry's first PCI target interface chip to support hot-swapping, providing an excellent solution for the CompactPCI interface. Employing SMARTarget technology, it ensures high-performance hot-swapping functionality, supports PICMG2.1 target devices with hot-swapping capabilities, and complies with the 32-bit 33MHz target interface function specified in the PCIv2.2 standard. It can achieve PCI burst transfer speeds up to 132 Mbytes/s, local bus operation speeds up to 60MHz, and supports mapping of five local address spaces to the PCI bus address space (spaces 0, 1, 2, 3, 4, and one extended ROM). Transfer wait cycles and bus widths are programmable. In addition, the PCI9030 includes a pre-charged BIOS, early power support, a hot-swap control/status register (HS_CSR), and additional pin resources. These resources, along with the ENUM# output signal, pop-out switch, and LEDs indicating user insertion/removal status, enable hot-swapping of motion control boards in both hardware and software. Its hardware block diagram is shown in Figure 1. The system consists of the following parts: • A core processor, TMS320LF2407, primarily handles real-time tasks such as position and speed PID control, interpolation iterative calculations, digital inputs and outputs, and PLC control. It also handles program and data storage and communication between the computer and the user. • An analog control circuit that converts the digital speed signal into an analog signal (-10V to 10V) via a four-channel 12-bit/analog converter chip, DAC7725, and outputs it to the motor servo drive module. The feedback circuit, composed of two CPLD components EPM7128SLC84, forms a four-channel 12-bit reversible pulse counter to cyclically count the encoded pulses of the differential photoelectric encoder, enabling hardware interruption of the encoder's Z-phase point. The FLASH circuit stores CNC parameters and instruction codes, and also protects data in emergencies. The switching circuit includes 8/8 general-purpose I/O points, four motor enable outputs, four left and right limit inputs for each axis, and a home interrupt input. The communication circuit connects a 3.3V PCI9030 chip and a dual-port RAM chip 70V24 to the PC's CompactPCI bus via a PCI interface in slave mode, enabling high-speed data transmission. This system is a closed-loop multi-axis motion control hardware system with fast and accurate calculation capabilities and strong data communication capabilities, making it an excellent platform for complex CNC systems. 3 Design of CompactPCI Interface The key point of the CompactPCI interface design is that during the hardware insertion and removal process, the CompactPCI bus should not be subjected to a large impact, and the correct data transmission on the CompactPCI bus should not be affected. Therefore, it should have a good hot power switching control circuit and corresponding bus circuit, as well as control signals that are easy for software to handle the hot plugging and removal process. The power control and PCI9030 interface principle block diagram is shown in Figure 2. 3.1 Function of PCI9030 chip hot plugging and removal control signal The CompactPCI specification stipulates that: (1) After the board is inserted, the blue light should be lit during the hardware initialization process; (2) When the board is about to be removed, the software can know that the board is about to be removed, and after doing the follow-up work, the blue light is lit. The PCI9030 chip has BD_SEIL# input signal pin, ENUM# output signal pin, CPCISW input signal pin and LEDON# output signal pin, all of which are used as hot plugging and removal control signals for the CompactPn interface. Their functions are as follows: The BD_SEL# input signal pin of the PCI9030 is connected to the BD_SEL# pin of the CompactPCI interface of the motion control card. When the BD_SEL# signal goes high, the output pin of the PCI9030 becomes high-impedance, protecting the chip. The ENUM# signal of the PCI9030 is an open-collector signal with a pull-up switch sent to the backplane; it notifies the backplane host CPU whether the card has just been inserted or is about to be removed. It also notifies the CPU of the system configuration change, causing the CPU to execute the necessary related software operations (installing the device driver during card installation; uninstalling the device driver before removing the card). The insertion/removal status of the card is completed by the CPCISW signal sent to the PCI9030. At this time, the PCI9030 notifies the backplane host of the hardware configuration change through the ENUM# signal, and the host CPU executes the necessary related software operations. When the operation is complete, the host CPU writes the CPCISW signal to the corresponding bit in the HS-CSR register via the PCI9030, causing the LEDON# signal to change, turning the blue LED on or off, notifying the board that it can be safely removed or has been safely inserted. Additionally, the PCI9030 writes the board insertion/removal status (i.e., the CPCISW signal) to the corresponding bit in the HS_CSR register. The software can use these bits to query the board insertion/removal status, allowing the software to take various switching actions. The bit can also be cleared by writing a 1 to the corresponding bit in the register. 3.2 Principle Design of Hot-Swap Power Supply Circuit 3.2.1 Determination of Hot-Swap Power Manager The hot-swap power supply circuit needs to monitor the power supply of the CompactPCI interface board during insertion/removal and normal operation, promptly powering on and off at a certain rate, and notifying the backplane system of the power supply status for software processing. Simultaneously, it needs to provide a pre-charge voltage to the bus signals of the CompactPCI interface board, ensuring the pre-charge voltage at the pins of the CompactPCI connector reaches 1V, minimizing the impact on the CompactPCI bus during insertion/removal. Furthermore, it needs to logically process the PCIRST signal of the backplane and the power status of the CompactPCI interface board to generate the LOCAL_PCI_RST signal on the interface board. Therefore, the hot-swap power supply circuit uses the LTC1646 chip as the CompactPCI hot-swap power manager. It enables the circuit board to be safely inserted and removed from the operating CompactPCI bus slot. Two external N-channel transistors (IRF7413) control the 3.3V and 5V power supplies, enabling power-up at current-limited or settable rates. Electronic circuit breakers protect both power supplies from overcurrent faults. 3.2.2 Main Pin Functions of the LTC1646 Chip: The 3.3V and 5V inputs of the LTC1646 primarily come from medium-length power pins. The long pins of the 3.3V and 5V connectors are shorted to the medium-length 3.3V and 5V power pins on the CompactPCI card, providing initial power to the LTC1646's pre-charge circuitry, VI/O pull-up resistors, and the PCI9030 chip. The connector pins on the CompactPCI backplane include pins BD_SEL# and HEALTHY# for hot-swappable power circuitry. The PWRGD# signal pin of the chip outputs an indication of when all power supply voltages are within tolerance. The HEALTHY# signal connected to the PWRGD# pin notifies the backplane host of the board's power status. When the HEALTHY# signal goes high, it indicates a problem with the board's power supply. The OFF/ON# input signal pin of the chip is connected to the BD_SEL# pin of the board and is used to control the board's power on/off or reset the power circuit breaker. The BD_SEL# signal should be pulled up to the PCI9030's I/O operating voltage VI/O through a 1.2kΩ resistor. The PRECHARGE pin of the chip is used to generate a 1V precharge voltage. This allows biasing of the bus I/O pins during board insertion and removal. The CompactPCI bus pins on the board that require pre-charging (i.e., the pins connecting connectors J1 and J2 to the CompactPCI interface device PCI9030) include: ADO~AD31, C/BEO#~C/BE3#, PAR, FRA ME#, IRDY#, TRDY#, STOP#, LOCK#, IDSEL, DEVSEL#, PERR#, and SERR#. The pre-charge signal generated by LTCl646 is pulled up to the pre-charge voltage (PRECHARGE OUT) through a large 10kΩ resistor. The BD_SEL#, ENUM#, and INTA# signals should be pulled up to the PCI9030's I/O operating voltage VI/O. The chip's RESETIN# pin inputs the signal PCI_RST#, which is logically combined with the HEALTHY# signal on-chip to generate the LOCAL_PCI_RST# signal at the RESETOUT# pin. This signal is sent to the PCI_RST# signal pin of the PCI9030 chip to reset the board and the PCI9030 chip when any power supply exceeds its range. 3.2.3 Power-on sequence of the CompactPCI interface board under LTC1646 chip control: When the card is inserted, the long 3.3V and 5V connector pins and the long GND pin contact first. The LTC1646 pre-charge circuit biases the bus I/O pins to 1V during the insertion phase. The medium-length 3.3V and 5V power pins contact in the next stage of insertion, but the board power is turned off as soon as the OFF/ON# pin is pulled up to the VI/O by a 1.2kΩ pull-up resistor. In the final stage of board insertion, the BD_SEL# short connector pins begin to contact, and the OFF/ON# pins are pulled low. This turns on the pass transistors; and an internal 5μA current source is connected to the TIMER pin. The current of each pass transistor begins to increase until it reaches its respective current limit; then, the 3.3V and 5V power supplies are allowed to power on at a certain rate. Once both voltages are within tolerance, HEALTHY# will be pulled low, and LOCAL_PCI_RST# can freely follow PCI_RST#. 3.2.4 Power-down sequence of the CompactPCI interface board under the control of the LTC1646 chip: When BD_SEL# is pulled high, a power-down process begins. An internal switch of the LTC1646 is connected to each output power supply voltage pin, causing the bypass capacitor to discharge to ground. The TIMER pin is immediately pulled low. The GATE pin is pulled low by a 200μA current source to prevent the load current on the 3.3V and 5V power supplies from simultaneously becoming zero, thus preventing interference with the power supply voltage. When any output voltage drops below the threshold, the HEALTHY# pin is pulled high, and LOCAL_PCI_RST# is determined to be low. Once the power-down process is complete, the card can be removed from the slot. During removal, the pre-charge circuit continues to bias the bus I/O pins to 1V until the 5V and 3.3V long connector pins separate. 3.3 Other Electrical Measures for CompactPCI Interface Design • To protect the hot-swappable card from electrostatic damage during hot-swapping, electrostatic discharge must be performed. Therefore, a discharge strip must be designed on the card. • To reduce the impact of CompactPCI bus signal line branches on the bus, series resistor matching must be applied to the CompactPCI bus signals. Pins requiring series matching resistors include: AD0～AD31, C/BE0#～C/BE3#, PAR, FRAME#, IRDY#, TRDY#, STOP#, LOCK#, IDSEL, DEVSEL#, PERR#, SERR#, and INTA#. According to the CompactPCI specification, the length of the signal lines and the branch lines to the pre-charge resistor must be limited (the characteristic impedance of the PCB wiring should be designed to be 65Ω ± 10%). Shorter lines result in less impact on the CompactPCI bus. On the CompactPCI interface board, for pre-charge signals, the total signal line length from connector J1n or J2 to the PCI9030 device pin should be less than 38.1mm. Specifically, the PCB trace length from the connector pin to the series resistor should be less than 15.2mm, and the branch length of the pre-charge resistor should ideally be zero, with a maximum length not exceeding 2.5mm. To reduce inrush current generated by capacitors during insertion and removal and to prevent connector burnout, the total amount of filter capacitors must be limited. The design of the CompactPCI interface on the position control board is an inevitable requirement for the development of network motion control systems. Through the hot-swappable Compact-PCI interface bus for connection between the computer and the network motion control system, higher reliability and the ability to replace faulty boards while powered on are achieved.