Digital control systems offer designers numerous advantages, such as advanced computational capabilities and cost reduction. Therefore, the selection of a digital processor becomes a primary consideration when implementing a digital motor control system. Real-world signals are continuous in time, but the precision of digital signal representation is limited, and sampling times are discontinuous, leading to quantization. Obvious sources of quantization include ADCs, computational engines with truncation, rounding, and overflow error characteristics, and pulse width modulation (PWM) generators. Using a longer word length ADC minimizes quantization errors (embedded controllers typically use 12-bit ADCs). Designers also need to consider the errors that arise when sampling multiple currents. Using an ADC to continuously sample two currents limits the resulting error. Using an ADC with dual sample-and-hold circuitry avoids this error altogether. The numerical representation of the algorithm is the most critical area where quantization effects exist. Simultaneously using simulation and experimental analysis to study practical digital controllers is a practical method for analyzing quantization errors. The system shown in Figure 1 below employs both simulation and experimental execution. Figure 1: The choice of digital processor is a major consideration when implementing a digital motor control system. The system's algorithm employs three formats: 16-bit fixed-point, 32-bit fixed-point, and 32-bit IEEE-754 single-precision. All use the same 32-bit fixed-point digital controller—TI's TMS320F2812—and the TI "IQmath" library for 32-bit fixed-point programming. The "IQmath" library allows designers to easily and quickly convert C code written in floating-point format to 32-bit fixed-point format. Since performing floating-point arithmetic on a fixed-point processor is not efficient enough, the floating-point implementation requires a longer 4kHz sampling time. Therefore, for fairness, experimental results will only be compared between the 16-bit and 32-bit fixed-point formats. To compare the impact of the three data formats on numerical accuracy, the estimated speed response and the corresponding d-axis and q-axis reference currents were observed. Figure 2: Simultaneous use of simulation and experimental analysis to study practical digital controllers is a practical method for analyzing quantization errors. A 16-bit fixed-point system (Figure 2 above) exhibits pseudo-transients and ringing, while a 32-bit system does not. Experimental results also show similar characteristics. In practical systems, these transients can lead to audible noise and vibration (Figure 3 below). Sampling Frequency: A key factor that must be considered for any digital system is the sampling frequency – the Nyquist theorem. The highest frequency component in the system must be determined. It is common practice to choose a frequency at least four times that of a first-order system. To illustrate this effect, we decompose a simple single-pole transfer function. This transfer function is expressed as: G(s) = s + 100/100. At appropriate sampling intervals, the coefficients are fine. However, when sampling is over-sampled, serious resolution problems arise. Examining the coefficient magnitude reveals the quantization effect. As the sampling rate increases, the numerator coefficient decreases. When the sampling rate is 10 microseconds, the coefficient drops to 0.00099950016, displayed as 0x0020. This means the coefficients have a 5-bit resolution, which is a serious problem for a 16-bit processor. A better value could be obtained using 32-bit arithmetic. In this case, a 32-bit processor capable of natively representing fractions in 32-bit form, such as the TMS320F2812, can avoid these problems. The digital pulse width modulator (PWM) in an embedded controller generates the PWM output using a counter and a compare buffer. However, this approach has its drawbacks: the smallest change in the PWM output equals the counter's clock cycle, leading to quantization problems as the PWM frequency increases. This is particularly important in the power factor correction phase related to motor control inverters, where PWM frequencies exceeding 200kHz are common. At this point, a 100MHz component with a PWM resolution of approximately 8 to 9 bits will encounter periodicity issues. The high-resolution PWM architecture first implemented in the TMS320F280x digital signal controller solves this problem, providing a resolution of 150ps. Figure 3: The system was implemented using both analog and real-world methods. The algorithm was implemented in three different formats: 16-bit fixed-point, 32-bit fixed-point, and 32-bit IEEE-754 single-precision floating-point. Figure 4: The 16-bit fixed-point system exhibited pseudo-transient and ringing phenomena, while the 32-bit system did not. Figure 4 shows the high-resolution PWM and standard PWM in operation. As can be seen from the software curves, a step is generated when the high-resolution function is disabled. When the high-resolution function is enabled, the yellow curve is formed. Clearly, high-resolution PWM can reduce the quantization error in the PWM output by several orders of magnitude, thus significantly reducing the limiting period caused by lower-resolution PWM. System designers can use 32-bit arithmetic to improve the performance of motor control systems. Moreover, 32-bit arithmetic allows designers to avoid detailed checks on the quantization of the algorithm, enabling them to use higher sampling rates and thus increase system bandwidth. To fully understand the quantization effect and achieve the best performance, designers must properly address the output quantization issue through technological improvements such as high-resolution PWM.