Abstract: This paper explains the operating principle of managing each module within a DC-DC power management chip through analysis of the switching power supply principle. It proposes a design philosophy, details the operating principle of each functional module, and finally implements the chip using BiCMOS technology. Keywords: switching power supply, current-mode PWM control, boost converter Introduction Power supply is the heart of all electronic devices, and its quality directly affects the reliability of these devices. This is especially true for switching power supplies, which are receiving increasing attention. Current computer equipment and various high-efficiency portable electronic products are trending towards miniaturization, resulting in relatively high power consumption. This necessitates smaller, lighter, and more efficient battery-powered systems, requiring the use of high-efficiency DC/DC switching power supplies. Currently, the main development direction of power electronics and circuits is modularization and integration. Specialized chips with various control functions have developed rapidly in recent years. Integration and modularization have made power supply products smaller and more reliable, greatly facilitating applications. On the other hand, in switching power supply DC-DC converters, due to fluctuations in input voltage or output load, the average DC output voltage must be controlled within the required amplitude deviation range, requiring complex control technology. Therefore, the research on various PWM control structures has become a hot topic. Under these circumstances, designing and developing switching power supply DC-DC control chips is valuable both economically and scientifically. 1. Analysis of Switching Power Supply Control Circuit Principle A DC-DC converter uses the switching of one or more switching devices to convert a DC input voltage of one level into a DC output voltage of another level. Under a given DC input voltage, the average output voltage is controlled by adjusting the conduction time of the circuit switching devices. One control method is to use a fixed frequency for switching and adjust the conduction interval length to control the average output voltage. This method is also called pulse width modulation (PWM). PWM can be divided into two categories based on the control method: voltage mode control and current mode control. The basic principle of voltage-mode control is to compare the output signal of the error amplifier with a fixed sawtooth wave to generate a PWM signal for control. From the perspective of control theory, voltage-mode control is a single-loop control system. A voltage-controlled converter is a second-order system with two state variables: the voltage of the output filter capacitor and the current of the output filter inductor. A second-order system is conditionally stable; only with careful design and calculation of the control circuit, and under certain conditions, can the closed-loop system operate stably. Figure 1 shows the principle block diagram of voltage-mode control. Current-mode control compares the output signal of the error amplifier with the sampled peak inductor current, thereby controlling the duty cycle of the output pulse, causing the peak inductor current to change with the error voltage. Current-mode control is a first-order system, and first-order systems are unconditionally stable. It adds a current negative feedback loop to the traditional PWM voltage control, making it a dual-loop control system, so that the inductor current is no longer an independent variable, thus transforming the second-order model of the switching converter into a first-order system. As shown in Figure 2, compared to the single-loop voltage control mode, the current-mode control is a dual-loop control system. The outer loop is formed by the output voltage feedback circuit, and the inner loop is formed by the current transformer sampling the output inductor current. In this dual-loop control, the voltage outer loop controls the current inner loop; that is, the inner loop current rises in each switching cycle until it reaches the error voltage threshold set by the voltage outer loop. The current inner loop performs instantaneous, rapid pulse-by-pulse comparisons and monitors the dynamic changes in the output inductor current, while the voltage outer loop is only responsible for controlling the output voltage. Therefore, the current-mode control mode has a much larger bandwidth than the voltage-mode control mode. [align=center]Figure 2. Block diagram of current-control principle[/align] Current-control mode has many advantages: excellent linear regulation (voltage regulation); the entire feedback circuit becomes a first-order circuit. Since the feedback signal circuit is one order lower than that of voltage-type control, the control loop compensation network of the error amplifier is simplified, stability is improved, and frequency response is enhanced, resulting in a larger gain-bandwidth product; it has instantaneous peak current limiting function; it simplifies the design of feedback control compensation networks, load current limiting, flux balancing, and other circuits, reducing the number of components and cost. This is of great significance for improving the power density of switching power supplies and achieving miniaturization and modularization. Of course, there are also disadvantages. For example, the system may become unstable when the duty cycle is greater than 50%, potentially generating subharmonic oscillations; additionally, there are limitations in the selection of circuit topology. In boost and buck-boost circuits, since the energy storage inductor is not at the output terminal, there is an error between the peak current and the average current. It is also sensitive to noise and has poor noise immunity. Solutions to these disadvantages have been developed, and ramp compensation is a necessary method. 2. Design of Internal Chip Modules The purpose of this design is to create a boost DC-DC power converter chip based on PWM control. This chip implements a current-mode PWM control circuit based on a first-order dual-loop (voltage loop and current loop) control system. The integrated module will include control, drive, protection, and detection circuits. Finally, based on the basic framework of the circuit system, and combining power electronics and microelectronics technologies, a BiCMOS process is used to specifically study the implementation of the DC-DC converter circuit. System Design, System Block Diagram, and Design Ideas of Each Functional Module [align=center]Figure 3 System Module Principle Block Diagram[/align] The following describes each functional module of the system: ① Error Amplifier Circuit The error is a high-gain differential amplifier used to adjust the converter. The amplifier generates an error signal, which is supplied to the PWM comparator. An error signal is generated when the output voltage sample is compared with the internal voltage reference and the difference is amplified. Pin 2, Vref, of the error amplifier is the fixed reference voltage generated by the reference voltage. ② The PWM comparator receives a current sampling signal (the sum of the inductor current and the compensation harmonics generated by the oscillator). If this current exceeds the error signal, the PWM comparator flips, resetting the driver latch to disconnect the power switch, thus controlling the switching transistor's on/off state. ③ The oscillator module provides a clock signal of a certain frequency to set the converter's operating frequency and a timing ramp wave for slope compensation. The clock waveform is a pulse, and the timing ramp wave is used for ramp compensation, added at the inductor sampling terminal. ④ The driver latch includes an RS flip-flop and related logic. It controls the power switch state by turning the driver circuit on and off. A low output level from the latch disconnects it. In normal operation, the flip-flop is set high during the clock pulse, and the latch resets when the PWM comparator output goes high. ⑤ Soft-start circuit module: When the entire system starts up, the inductor generates a large inrush current. Soft-start prevents the system from starting at full duty cycle, allowing the output voltage to increase to the rated regulation point at a controlled rate. The design idea is to use the charging and discharging of the external capacitor to gradually increase the duty cycle, achieving output stability. ⑥ Current sampling circuit: Provides slope-compensated current-sensitive voltage to the PWM comparator. ⑦ Protection circuit module: Monitors the current of the power switch. If the value exceeds the rated peak value, this circuit activates, restarting the soft-start cycle. 3. Several details that must be considered in the design: ① Regarding ramp compensation: This is a fundamental problem in the current-controlled switching converter mentioned above. Current-controlled converters compare the actual inductor current and the current value set by the voltage outer loop across the PWM comparator to control the switching transistor. The reason for ramp compensation is analyzed below. The following figures show the inductor current waveforms controlled by peak current with duty cycles greater than 50% and less than 50%, respectively. [align=center]Fig. 4 The principle of slope-compensate[/align] Where Ve is the current setting value of the voltage amplifier output, ΔI0 is the disturbance current, and m1 and m2 are the rising and falling edge slopes of the inductor current, respectively. As shown in the figure, when the duty cycle is less than 50%, the current error ΔIl caused by the disturbance current becomes smaller, while when the duty cycle is greater than 50%, the current error ΔIl caused by the disturbance current becomes larger. Therefore, when the peak current mode control is set to a duty cycle greater than 50%, the disturbance signal will be amplified after one cycle, resulting in unstable operation. At this time, slope compensation needs to be added to the comparator to stabilize the circuit. With slope compensation, even if the duty cycle is less than 50%, the circuit performance can still be improved. Therefore, slope compensation can effectively increase circuit stability, prevent the average value of the inductor current from changing with the duty cycle, and reduce the error between the peak value and the average value. Slope compensation can also suppress subharmonic oscillations and ringing inductor current. The details will not be elaborated here. Regarding ramp compensation, it is crucial to determine the precise magnitude of the slope of the compensation waveform. The method used is to establish a system model, derive the transfer function, and calculate the value of the compensation slope. This is a critical step. ② Regarding the soft-start issue: DC/DC switching power supplies are prone to inrush current during startup, which may damage the electronic system. To avoid excessive input current and output voltage overshoot during startup, a soft-start circuit must be used in the design. The drawback of this method is that when the output voltage threshold is not reached, inrush current may occur, potentially damaging the electronic system. Furthermore, even after the output voltage reaches the threshold, accidental overcurrent may cause the power supply to restart multiple times. Therefore, a period-to-period current limiting threshold should be used to limit the inrush current during power-up and prevent multiple restarts of the power supply. See Figure 5. [align=center]Figure 5 Soft startup circuit[/align] 4. Summary This paper provides a detailed analysis of the working principle of switching power supplies, designs the internal modules of the chip, and finally implements the chip using BiCMOS technology. The design of chip systems has a comprehensive grasp of chip system design and elaborates on the ideas of chip design. This method is of great help to chip system design in other fields and is therefore of great significance. References 1] Ridley, RB, A New Continuous-Time Model for Current-Mode Control, IEEE Transactions on Power Electronics, April, 1991 [2] RD Middlebrook, Modelling a Current-Programmed Buck Regulator, IEEE Applied Power Electronics Conference [3] RD Middlebrook, Topics in Multiple-Loop Regulators and Current-Mode Programming, IEEE Power Electronics Specialists Conference - 1985 Record [4] R.Jocob Baker, Harry W.li, David E.Boyce : CMOS Circuit Design, Layout, and Simulation Beijing Machinery Industry Press 2003 [5] Phillip E.Allen, Douglas R.Holberg. CMOS Analog Circuit Design (Second Edition) BEIJING Publishing House of Electronics Industry 2003