[b]1 Introduction[/b] Among all low-frequency oscillator circuits, the Wien bridge is the simplest. Its operation is almost unaffected by changes in the external environment, and it rarely deviates from its design intent. Even using very common standard components, it can output a very standard sine wave, and it is minimally limited by operational amplifiers. Nevertheless, the understanding of the Wien bridge should not be overly simplistic, as overly idealized or simplified designs can lead to performance or results deviating from design requirements. [b]2 Wien Bridge Oscillator[/b] We know that for an oscillating circuit, at a given frequency, the circuit gain is greater than 1, the phase shift is zero, and the feedback is returned to the input through a feedback network. Therefore, when designing an oscillator, phase shift must be considered first. Observing the standard Wien bridge circuit shown in Figure 1, R1 and C1 will produce a positive phase shift, while R2 and C2 will produce a negative phase shift. At a specific frequency, the positive phase shift produced by R1 and C1 is equal to the negative phase shift produced by R2 and C2, and the total phase shift is zero. At this frequency, the circuit may oscillate. [img=243,202]http://image.mcuol.com/News/080225172244470.jpg[/img] For Figure 1, considering the high-impedance input and low-impedance output characteristics of the operational amplifier, the transfer function of the Wien bridge network (R1, C1 and R2, C2) can be derived: [img=418,51]http://image.mcuol.com/News/080225172246331.jpg[/img] In the above equation, the imaginary part j represents a 90° phase shift (which may be positive or negative), while the real part (excluding the j term) has a zero phase shift. As the values ​​of the real and imaginary parts change, the specific phase shift also changes accordingly. If [img=380,53]http://image.mcuol.com/News/080225172246582.jpg[/img] in equation (1), then the real part of the denominator of equation 1 is zero, and only the imaginary part exists. Therefore, we have: [img=368,162]http://image.mcuol.com/News/080225172246663.jpg[/img] From the above equation, we can conclude that at a specific frequency, the transfer function of the Wien bridge is a pure real number with no phase shift. After analyzing the phase characteristics of the circuit in Figure 1, the next step is to consider its gain. To simplify the analysis, assuming R1=R2 and Cl=C2 in Equation 3, we have: [img=75,55]http://image.mcuol.com/News/080225172246974.jpg[/img] To meet the basic conditions of the oscillator (zero phase shift, unity gain), the operational amplifier circuit gain must be ≥3 to compensate for the attenuation of the Wien bridge circuit. To ensure consistent input voltages at the non-inverting and inverting terminals of the operational amplifier, a resistor divider network with an attenuation factor of 3 is added between the output and input of the operational amplifier to match the Wien bridge network (see Figure 1). Therefore, theoretically, generating a sine wave using a Wien circuit is very simple; however, practically speaking, it is not very meaningful because the accuracy of resistors is easy to control, while the accuracy of capacitor values ​​is difficult to control, and even capacitors with an accuracy of ±20% are very expensive. A more sensible approach is to first consider the impact of capacitor accuracy on the bridge performance and then find a low-cost way to compensate for it. Table 1 uses a simple data table to illustrate the Wien bridge network component parameters and their impact on the circuit gain. The 7th row is the result of the Wien bridge transfer function (Equation (3)), the 12th row is the operating frequency derived from Equation 2, and the 9th row is the reciprocal of the result of the 7th row. Assuming that C1=C2=10 nF and R1=R2=10 kΩ, the bridge will oscillate at 1.5915494 kHz because the gain of the op-amp is 3 at this time. If interested, an experimental circuit can be built according to the parameters in Figure 2 to verify this. It should be noted that the above circuit works normally under the condition that the accuracy of the capacitors is not lower than ±10% of the rated parameters, otherwise the circuit will stop oscillating or cannot output the correct frequency. For example, when the actual parameter of C1 is 8nF (80% of the rated value) and C2=18nF (180% of the rated value), the oscillator gain should be 4.25, that is, the 3 times gain is insufficient to make the bridge oscillate due to the large capacitor deviation. Conversely, when C1 is too large and C2 is too small, the bridge does not need 3 times gain compensation. At this time, the bridge will still oscillate, but distortion will occur. The greater the deviation, the greater the distortion. Furthermore, the oscillation frequency at this point is not the frequency required by the design. Therefore, an ideal circuit should ensure that the parameters of the bridge circuit match the op-amp gain. Too low a gain will cause the circuit to stop oscillating, while too high a gain will introduce distortion or deviate from the oscillation frequency. [img=363,329]http://image.mcuol.com/News/080225172247055.jpg[/img] To solve the above problems, a J-type FET is inserted into the circuit in Figure 1, as shown in Figure 2. This allows for a small change in the op-amp gain, ensuring continuous oscillation conditions. Upon power-up, the FET is turned on because its gate voltage is zero, resulting in low RDS for TR1. The op-amp gain is greater than 3 at this moment, ensuring circuit startup. Once the circuit starts oscillating, the op-amp outputs a signal, and the rectifier network inputs a negative voltage to the gate of the J-type FET, increasing its RDS or making it high-impedance. The end result is a decrease in the op-amp gain, thus bringing the oscillation circuit to a steady state. The output waveform amplitude depends on the forward voltage of the two series-connected diodes and the gate voltage supplied to the J-type FET. Unfortunately, due to manufacturing processes, the gate turn-off voltage of the J-type FET varies greatly between product batches. Even with the same circuit, the output voltage of different batches of JFETs varies significantly. TR1 (J201) was chosen in Figure 2 because its gate turn-off voltage varies less, thus ensuring minimal output waveform variation. Even so, the above circuit only guarantees circuit oscillation, not a low-distortion output waveform, because the added J-type FET merely forces circuit oscillation and cannot mask the design flaws. [img=335,248]http://image.mcuol.com/News/080225172247616.jpg[/img] Therefore, unless a more complex circuit design is used, a variable resistor must be inserted into the feedback loop of the circuit in Figure 2 to adjust the circuit gain in order to compensate for the bridge network gain and enable the op-amp to output a low-distortion sine wave. Design engineers may think that adding a variable resistor is simple, but it is not conducive to mass production due to high production costs. The ideal solution is to replace or insert electronically adjustable resistors or digital potentiometers into the resistor branches. For example, replacing the variable resistor VRI in Figure 2 with a low-cost, small-size, and simple digital potentiometer makes the circuit easy to adjust during mass production while minimizing output waveform distortion. Once the circuit starts oscillating, the digital potentiometer and J-FET can provide just the right gain, ensuring continuous oscillation without causing distortion due to excessive gain. A MAX5467 10 kΩ digital potentiometer can be used to replace VR1 in Figure 2. By inserting two more MAX5467s into branches R1, C1 and R2, C2, the user can easily adjust the circuit's output frequency. The MAX5467's digital control interface is very simple, requiring no microprocessor intervention. In Figure 3, after inserting two 10 kΩ digital potentiometers into branches R1, C1 and R2, C2, the bridge's operating frequency can be adjusted from 833 Hz to 1.6 kHz. Similarly, after VR1 is replaced by MAX5467, the gain changes when IC4 is changed, resulting in an output waveform that can be a DC voltage, a pure sine wave, and a distorted sine wave. [img=364,279]http://image.mcuol.com/News/080225172248007.jpg[/img] [align=left] The power supply circuit, frequency, and gain adjustment circuit are shown in Figures 4, 5, and 6, respectively. Using the transistor BC547, two sets of output voltages, +2.5V and -2.5V, can be obtained simultaneously (see Figure 5) to power the op-amp and digital potentiometers. The three digital potentiometers are IC2, IC3, and IC4. IC2 and IC3 occupy the same digital interface and change the resistance value (increase or decrease). However, the gain adjustment digital potentiometer IC4 is controlled independently, so the circuit gain can be adjusted separately. [img=326,468]http://image.mcuol.com/News/080225172248478.jpg[/img] [img=317,250]http://image.mcuol.com/News/080225172248969.jpg[/img] This article has provided a detailed analysis and description of the role of key components within a Wien bridge oscillator and their impact on the circuit. Only by ensuring the correctness of the basic circuit elements can we guarantee that the circuit will not fail due to additional circuitry. Through in-depth circuit analysis, the performance of the Wien bridge can be improved in two ways. First, the error of the capacitor components must be considered. Second, by adding appropriate external circuitry, such as low-cost digital potentiometers, the frequency accuracy can be improved and production costs reduced. Finally, it should be noted that the feedback loop can introduce distortion into the bridge output due to factors such as the stability of device performance. For example, the forward voltage of a diode drifts with temperature (2.1 mV/℃), and the bias voltage of a J-type FET also changes with temperature, both of which affect the output voltage. The solution is to add an RMS-to-DC converter or a peak level detector to the output circuit. These can be used to output a precise DC level signal proportional to the sine wave output, which is then fed back directly to the JFET input, thus making the output sine wave signal more stable. To improve the linearity of the JFET, two 100 kΩ resistors can be added around the JFET gate circuit. Since these resistors act as negative feedback, they reduce the nonlinearity of the JFET. [b]3 Conclusion[/b] Theoretically, the Wien bridge circuit is very simple. However, in actual design, neglecting the performance of actual components such as capacitors often leads designers astray. Inserting low-cost digital potentiometers at three key locations on the bridge can ensure more stable circuit operation and facilitate production debugging.