1. Introduction Following the Homeplug 1.0 standard established by the international organization Homeplug in June 2001, the attitude of power companies worldwide towards PLCs has shifted significantly. In the short term, PLCs are likely to collaborate with other technologies such as WLAN and XDSL, with a future trend of unified integration as user habits and technology mature. PLC technology can utilize medium/low-voltage lines in distribution networks to transmit high-speed data, images, voice, and other multimedia service signals. Data communication transmission over low-voltage residential power lines (110V-220V single-phase AC) can be broadly categorized into two solutions: broadband access and home network. Broadband access primarily utilizes the low-voltage distribution network, referring to a one-to-many communication architecture from medium-voltage substations to user meters to solve the "last 1000 meters" problem. Home network solutions refer to establishing high-speed LANs within user homes via power lines. In medium-voltage lines, its communication methods can establish a reliable data transmission platform for distribution automation systems. Research and development of this technology will help fully leverage the enormous advantages of power system resources. 2. Introduction to OFDM Technology 2.1 History and Current Status of OFDM Technology Power lines, as a communication medium, differ from other types. Power lines contain various system noises and random noises, and the presence of numerous electrical devices on the lines creates unpredictable interference sources. Furthermore, the use and shutdown of electrical devices are unpredictable, causing the characteristics of power lines to constantly change. Therefore, the transmission characteristics of power lines are difficult to describe with accurate mathematical models, and the power line channel is not constant and uncontrollable in the time domain. With the development of digital communication, DSP, and the Internet, OFDM (Orthogonal Frequency Division Multiplexing) technology, which resists interference, impedance mismatch, and multipath fading, has gradually overcome some of the shortcomings of power line transmission characteristics, enabling high-speed data communication over power lines. Chang.rw first proposed the conceptual model of OFDM in 1966, but it was Weinstein and Ebert who solved the engineering implementation problem of OFDM technology. In 1971, they proposed the idea of ​​using Dynamic Fourier Transform (DFT) and Inverse Fourier Transform (IFFT) to achieve modulation and demodulation of baseband signals, which greatly reduced the technical implementation difficulty of OFDM. Currently, OFDM technology has been widely used in mobile communications, digital video broadcasting (DVB), digital audio broadcasting (DAB), and digital subscriber line (XDSL) sequences. 2.2 Basic Principles of OFDM Technology OFDM is a multi-carrier transmission technology. Its biggest feature is its high transmission rate and strong resistance to inter-symbol interference and channel fading. Its basic idea is to transform the serial data stream into parallel processing, that is, to convert the serial data into several parallel data and distribute them to the same number of different orthogonal subcarriers to achieve the purpose of parallel data transmission, effectively suppressing inter-symbol interference and eliminating the need for complex channel equalization processing. Suppose that the symbol sequence d0, d1, ..., dn-1 transmitted in one cycle is modulated onto n subcarriers f0, f1, ..., fn-1 by a serial-to-parallel converter. These subcarriers satisfy orthogonality, and their spectra overlap. Subcarrier spectral orthogonality means that in a traditional frequency division multiplexing (FDM) system, the frequency difference between two adjacent subcarriers is at least 3 to 5 times the system's symbol transmission rate is fs, and the center frequencies of two adjacent subchannels must differ by at least 3 to 5 times fs to prevent adjacent-channel interference. In FDM, adjacent subcarriers are very close, greatly improving spectral efficiency, and they overlap in the frequency domain. Research shows that as long as the subcarriers satisfy specific orthogonality constraints, frequency conversion and integration can effectively separate the signals of each subchannel. 3.1 Main Characteristics and Functional Structure of the INT51X1 Chip The INT51X1 is a well-developed OFDM processing chip from Intel, Inc., conforming to the HomePlug 1.0.1 standard. Its uplink transmission rate can reach up to 14 Mbps. It integrates multiple interfaces including USB 1.1, Ethernet, and MII/GPSI, as well as ADC, DAC, and AGC controllers, making it an ideal processor for PLC communication device development. The INT51X1 is a dedicated MAC/PHY integrated transceiver for power lines. It uses Intel's proprietary PowerPacket orthogonal frequency division multiplexing technology with 84 subcarriers, employing Robo/DPPSK/DQPSK modulation methods. Subcarrier allocation can be based on the signal-to-noise ratio (SNR) at the transceiver end to overcome the effects of noise and multipath fading. It achieves synchronization in low SNR channels without the need for pilots. Its internal structure consists of an I/O module, a PowerPacket MAC module, a PowerPacket PHY module, and an ADC/DAC module, as shown in Figure 1: [align=center] Figure 1 Internal Structure Diagram of int51x1[/align] The PowerPacket MAC module mainly performs link layer functions and is the core part of the int51x1. This module includes a Reduced Instruction Set Computing (RISC) processor core, a program memory (ROM) containing OFDM data processing, encryption/decryption algorithms, and channel optimization algorithms, a link sequence, a data memory (RAM), and two direct data transmission channels (DMA). All data sent from the user to the power line network or from the physical layer is processed by certain algorithms in the MAC module. The MAC uses the Carrier Sense Multiple Access/Collision Avoidance (CSMA/CA) protocol to access the public power line channel, supplemented by Automatic Repeat Request (ARQ) and power packet priority mechanisms to ensure transmission reliability. The flexible prioritization of power data packets gives the Int51x1 strong burst traffic processing capabilities, allowing multi-frame transmission on power lines. This significantly reduces the demands on the network receiver, maximizing network throughput while ensuring minimal latency and optimal signal stability. Due to the free-competition media access method, any single node can act as the controller for the entire network. Furthermore, the MAC layer features flow control, ensuring excellent service quality even on harsh power line channels. The PowerPacket PHY module implements physical layer functions, primarily establishing, maintaining, and dismantling physical connections to guarantee transparent bitstream transmission on power lines. This module mainly consists of a physical layer logic sequence, a FIFO queue corresponding to the MAC sublayer DMA channel, and a forward analog channel. It also integrates an automatic gain control (AGC) circuit for external operational amplifiers. A pair of high-speed 10-bit A/D and D/A converters form the forward analog channel with a sampling rate of 50 Mbps. The reference voltage is independent of the chip, enabling low-power operation. After connecting operational amplifiers and filters, it can be connected to the power line via a power line coupling device. The I/O module integrates various interfaces between the MAC and the host, as well as peripheral devices, offering rich and comprehensive functionality. Interfaces with the host include a USB interface, a media-independent interface (MII) or a universal serial interface (GPSI, optional), and a management data interface (MDI). Interfaces with peripherals include an eProm interface (SPI), an emulation interface (JTAG), and an LED interface for operational status monitoring. MII is a standard industrial interface; its transmission and reception are performed in four-bit parallel mode, synchronized by the MAC clock, and includes CSMA/CD protocols. Through the MII interface, the Int51X1 can be directly connected to an Ethernet MAC controller. The host can easily access the Int51X1's internal control/status registers via MDI, thereby configuring the Int51X1 and monitoring its real-time operating status. The control and status registers of the INT51X1 are both 16-bit registers. The status registers reflect real-time link status, transmission rate, preamble decision, auto-negotiation, fuzzy detection, and other information. Upon power-up, the INT51X1 is initialized by reading data pre-written to the E-prom via the SPI interface. PowerPacket uses a 56-bit DES key management system. In addition to the default key set by the INT51X1, users can define their own keys to ensure reliable and secure powerline transmission. 3.2 INT51X1 Pin Description: The INT51X1 uses a μBGA package, has 144 pins, a 3.3V supply voltage, and a 1.5V supply voltage for the chip core. It offers three operating modes: USB, PHY, and Host/DTE. Some multiplexed signal pins, such as MII, MDI, and SPI interface signals, have different functional definitions depending on the mode. Other signal lines are the same in all three modes. There are 26 control data lines for the analog front-end AFE, mainly for ADC input, DAC output, and op-amp AGC control; and 3-wire LEDs. JTAG (5 lines), clock (2 lines), test (2 lines), and multiple power and ground lines; the selection of the three modes is determined by the states of the mode0 and mode1 pins. 3.3 Introduction to the W90N740 Microprocessor The W90N740 is a high-performance, low-power microprocessor developed by Winbond Inc. of Taiwan, based on a 32-bit ARM core. The W90N740 uses an ARM7 TDMI core, integrates two 10/100MB MAC Ethernet controllers, and employs Winbond's proprietary NAT accelerator. This device accelerates network packet conversion in hardware, reducing the burden on the central processing unit and significantly improving the overall system performance over broadband. The chip-integrated USB controller allows connection to various computer peripherals via a USB interface, adding value to the product. Furthermore, the W90N740 also integrates an EBI (External Bus Interface) controller, system manager, and GDMA controller. Therefore, in many application areas, systems designed using this device have lower costs than similar products currently available. In addition, ARM's development environment supports assembly language, C and C++, making software development very convenient. Therefore, although the W90N740 is not a mainstream product, it is still one of the choices for many network electronic products. 4 OFDM power distribution automation system design 4.1 Design of system communication terminal and substation (1) Hardware and software composition of communication terminal. See Figure 2 for the hardware circuit design of communication terminal. [align=center] Figure 2 Hardware circuit design of communication terminal[/align] The communication terminal is based on Int51X1 and W90N740. Int51X1 is selected in PHY mode to form an eth-plc router. W90N740 is connected to one 2m×16-bit data width flash external program memory (4m bytes) through the external bus interface EBI, and is equipped with two 4m×16-bit data width SDRAMs (16m bytes) of SDRAM. The INT51X1 host connects to the W90N740 Ethernet MAC controller 0 via the MII interface. The W90N740 then connects to the ETH PHY (RTL8201) via the Ethernet MAC controller 1. An RJ-45 interface is then provided from the RTL8201 chip to connect to the network switch. On the power line side, the AFE uses a 12V SIP specification and is coupled to the 10kV power line using a coupler. The coupler only contains the coupling part and does not contain the power supply part. A high-frequency bridge is connected across both ends of all series switches. The terminal requires a variety of operating power supplies, including +12V, +5V, +3.3V, +1.8V, and +1.5V, which are obtained by rectification and corresponding DC-DC modules. The terminal uses the JTAG programming tool to program the embedded Linux kernel (uclinux-2.4.x) and the source code of the 10/100M Ethernet interface driver and serial port driver to the flash chip. In addition, the TCP/IP protocol stack is loaded on uclinux, which enables it to communicate with the host PC through the switch in a connection-oriented manner. (2) Hardware and software composition of the substation. The design of the substation is basically similar to that of the terminal, so no diagram is attached. The W90N740 interfaces with automation equipment such as FTU and TTU through the on-chip serial UART and interfaces with the Int51X1 through the on-chip Ethernet MAC controller. Since the communication between the substation and the terminal is completed through power line carrier, the substation design removes the RTL8201 chip and RJ-45 interface. The W90N740 is connected to a 128kb flash (SST29LE010-150-4I-NH) via EBI. This is a 3.3V chip, 32-lead, PLCC package. The on-chip 8kb i-cache is configured as SRAM, and a 3.3V RS-232 converter (MAX2323) is added. The coupler is modified to be compatible with 10kV power distribution lines for high-voltage isolation, with a characteristic impedance of 300-400Ω on the power line side. The power supply is pulled out separately. Initialization data is written to the EEPROM of the Int51X1. The W90N740 is programmed using ARM7 and stored in the external flash memory. This enables functions such as receiving FTU/TTU data from the RS-232 port, packaging it, sending it to the Int51X1 via MAC, receiving data from the Int51X1 via MAC, unpacking it, sending it to the FTU/TTU, and initializing the substation upon power-up. 4.2 Design and Development of OFDM Distribution Automation System Software The distribution automation (DA) master station is the control and management center of the distribution automation system. It typically uses a client/server architecture to form a computer local area network system, with SCADA and GIS (Geographic Information System) as the basic platforms, and various application software to complete the functions of DA/DMS (Distribution Automation/Distribution Management System). Figure 3 is a simplified diagram of the system's functional modules. [align=center] Figure 3 System Functional Module Diagram[/align] Each parameter has a separate table, with more than ten records including user information, and an operation log to record user operations in detail for easy management. The master station PC control software is developed on the Visual C++ 6.0 platform and can run on various popular Windows platforms such as Windows 2000 Professional, Windows 2000 Server, Windows NT, and Windows XP Professional. The database is installed on a dedicated PC as a server, independent of the master control machine. The host computer and the slave computer primarily use socket stream communication, providing bidirectional, ordered, non-repeating, and boundary-free data stream services, and are connection-oriented. The system uses a custom protocol conforming to the power communication standard. The IP datagram encapsulation format transmitted in the network is as follows: version (IPv4), header length, service type, total length, flags, time to live, protocol, header checksum, source IP address, destination IP address, options, padding (optional), and data. The IP datagram encapsulation length is 64kb; if the data is insufficient, it is padded with all zero bytes. All control commands and data parameters are defined as an abstract struct data type object. The host computer follows the socket communication process. After process initialization, it starts listening() on the custom port 3188. After receiving a connect() from the terminal, it accepts() and finally completes the three-way handshake process to establish a reliable connection for the terminal. Then it continues to listen on the port to wait for communication with other terminals. The terminal and the substation receive data transmitted via power lines using the int51x1 chip through broadcast calls. 5 Conclusion Carrier communication is a traditional communication method in power systems on high-voltage power grids, but its shortcomings on low-voltage power lines have not been well resolved. Spread spectrum communication provides an effective solution for low-voltage power line carrier communication. It is believed that in the near future, low-voltage power line carrier communication will be more deeply applied in distribution automation systems and will give full play to the advantages of power systems more efficiently. References [1] Sun Desheng, Guo Zhizhong. Overview of distribution automation systems. Relay, 1999, 27(3) [2] Yin Xiaogong, Yang Lingjun, Wan Bo. Power line OFDM processor int51x1 and its development. Relay, 2004, 32(17) [3] W90N740 reference manual. Winbond Electronics Corp. 2003 [4] Chen Tang, Zhao Zukang et al. Distribution systems and their automation technology. Beijing: China Electric Power Press, 2003. [5] E. Lakerrvi, Ejholmes. Translated by Fan Mingtian et al. Distribution Network Planning and Design. Beijing: China Electric Power Press, 2000. [6] int51x1 integrated powerline mac/phy transceiver with usb and ethintegrated bridges. Intellectron Corp. 2003. About the Authors: Xu Bin (1981-) Male Master's student. Main research directions: communication network technology, power line communication and computer network communication and security, etc. Yin Xiaogong (1945-) Male Professor Doctoral supervisor. Main research directions: signal processing, communication network technology and power line communication, etc.