1 Introduction Currently, the Ethernet protocol is widely used in various computer networks, such as office LANs and industrial control networks, and continues to evolve. New Ethernet-based technologies and networking devices are constantly emerging, and Ethernet has become one of the most commonly used LAN standards. However, there are not many Ethernet-based embedded systems. This is due not only to the relatively slow operating speed and limited resources of embedded systems, which are insufficient to implement various Ethernet protocols, but more importantly, to the relatively complex design of Ethernet interfaces and protocols, which is daunting. This paper will discuss the interface circuit implementation and programming method of an embedded system based on the C8051F series microcontroller system and the 10Mbps Ethernet controller chip RTL8019AS. 2 Embedded Ethernet Interface Analysis 2.1 Interface Composition An 8-bit MCU embedded device transmits data collected by the 8-bit MCU to a remote server through an Ethernet interface. This process requires handling network interface issues, analysis of received data, and encapsulation of transmitted data segments. Taking 10BaseT Ethernet as an example, the process of sending data involves first Manchester encoding the data, then preprocessing the encoded data to make it suitable for 10BaseT Ethernet transmission, and finally sending the processed data to the Ethernet network at an appropriate speed. To ensure data validity, the system should also have collision detection and retransmission capabilities. Implementing this functionality directly with an 8-bit MCU is very difficult. The solution is to use a dedicated network interface chip (NIC) – a network interface card. These chips adhere to the CSMA/CD protocol specified in IEEE 802.3 and, in addition to providing the electrical performance required for the physical link, also provide Manchester encoding, collision detection, and retransmission functions. Data transmission and reception can be completed with very few external circuits. Thus, the 8-bit MCU only needs the NIC chip to provide initial configuration and a data interface, which is sufficient for an 8-bit MCU. Based on the above analysis, the Ethernet interface of the embedded device of the 8-bit MCU is shown in Figure 1: [align=center] Figure 1 Ethernet interface composition of embedded device[/align] 2.2 Ethernet control chip - RTL8019AS (1) Main performance of RTL8019AS l Complies with Ethernet II and IEEE 802.3 (10base5, 10base2, 10baseT) standards; l Full-duplex, the transmit and receive can reach a rate of 10 Mbit/s simultaneously; l Built-in 16kb SRAM for transmit and receive buffer, reducing the speed requirements of the main processor; l Supports 8/16-bit data bus, 8 interrupt request lines and 16 I/O base address selection; l Supports automatic detection of UTP, AUI, BNC, and also supports automatic polarity correction for 10baseT topology; l Allows programmable output of 4 diagnostic LED pins; l Uses CMOS technology, low power consumption. Single 5V power supply. (2) Internal Structure of RTL8019AS The RTL8019AS chip contains a remote DMA (Direct Memory Access) interface, a local DMA interface, MAC (Media Access Control) logic, data encoding and decoding logic, and other interfaces. The DMA here is somewhat different from the DMA we usually talk about: the local DMA operation of the RTL8019AS chip is completed by the controller itself; while remote DMA does not mean that the data can be automatically moved to the main processor's memory without the participation of the main processor. It means that the main processor can read and write the chip's RAM buffer by giving the starting address and length. The RAM address is automatically incremented by 1 after each operation, while ordinary RAM operations require sending the address first and then processing the data, which is slower. The internal structure is shown in Figure 2. 3 Embedded Device Network Interconnection Design Scheme 3.1 Circuit Principle Design
The C8051F020 is a mixed-signal SoC (System-on-a-Chip) 8-bit microcontroller from Cygnal, Inc. It is a fully integrated mixed-signal system-on-a-chip with an 8051-compatible microcontroller core and full MCS-51 instruction set compatibility. The core employs a pipelined architecture, reducing the machine cycle from the standard 12 system clock cycles to 1 system clock cycle. 70% of instructions execute in 1 or 2 system clock cycles, significantly improving processing power, with peak performance reaching 25 MIPS. In addition to standard 8051 digital peripherals, the C8051-F020 integrates almost all analog and digital peripherals and other functional components required for a microcontroller data acquisition and control system. These peripherals include: analog multiplexers for various analog signals, a true 12-bit conversion ADC, and digital peripherals such as SMBus (I2C compatible), UART, SPI, multiple multi-function counters/timers, a watchdog timer (WDT), and a power monitor to meet special function requirements. The C8051F020 is packaged in a 100-pin TQFP package, features low power consumption, and operates from 2.7V to 3.3V. All I/O, RST, and JTAG pins are 5V tolerant. Its MCU has 64 general-purpose I/O ports (P0-P7), each configurable as push-pull or open-drain outputs. Since the RTL8019AS operates at 5V while the C8051F020 operates at 3.3V, additional system configuration is required to ensure the C8051F020's outputs can effectively drive 5V-input OLEDs. Besides setting the corresponding port's output to open-drain, each port should be connected to a 5V power supply via a pull-up resistor to ensure the C8051F020's logic "1" output is boosted to 5V. The microcontroller uses the C8051F020 chip to continuously read the RTL8019AS status register in polling mode. Data from the RTL8019AS is sent or read remotely via DMA. See Figure 3 for details. Since the network controller has Ethernet (IEEE 802.3) protocol processing capabilities, the system can directly connect to the Ethernet via RJ45 (and then access the Internet via Ethernet). The RJ45 connector used in the system designed in this paper is the LF1S022, which already has level conversion capabilities, simplifying the PCB design. It is worth noting that when designing the PCB, the RJ45 connector should not be too far from the CPU and network chip to avoid affecting data transmission. The TPIN+ (pin 59) and TPIN- (pin 58) pins of the RTL8019AS are a pair of TP input pins, capable of receiving differential Manchester-encoded data from the twisted pair at a rate of 10 Mbps. TPout+ (pin 45) and TPout- (pin 46) are a pair of Manchester-encoded differential TP output signals. To prevent twisted-pair overload, these output signals are interrupted prematurely, thus reducing congestion. During connection, these four pins are connected to pins 7, 6, 5, and 4 of the LF1S022, respectively. The other pins of the connector are connected to ground via a capacitor. Finally, a 20MHz crystal oscillator must be connected between pins 50 and 51. The extended RJ45 port in Figure 3 connects to the internet. The RTL8019AS sends received data to the on-chip SRAM via local DMA, or reads data from the on-chip SRAM and sends it out through the RJ45 port.
The network card's reset signal, RSTDRV, is generated by the microcontroller's P5.2 pin. RSTDRV is active high and requires a bandwidth of at least 800ns. A high-level signal of more than 1μs generated by the P5.2 pin can reset the RTL-8019AS chip. How long should the microcontroller wait after RSTDRV transitions from high to low before it can operate on the network card? The reset process performs some operations, such as initializing internal registers. These require at least 2ms. To ensure a complete reset, a longer wait should be taken before operating on the network card, such as 100ms. RSTDRV can be connected to a microcontroller I/O line for network card reset, or it can be connected in parallel with the microcontroller's reset pin. When the microcontroller resets, the network card also resets, reducing the use of a microcontroller pin. 3.2 Initialization of the network card Before the network card can work properly, it must be initialized. Generally, on a computer with an operating system, the initialization of the network card is completed by its driver. In this example, since the C8051F020 microcontroller is a bare machine (without driver), not only does the user need to complete the initialization of the network card, but the user also needs to set the MAC (Media Access Control) address of the network card and perform read and write access to the network card. Initialization requires setting the relevant registers of page 0 and page 1. The registers of page 2 are read-only and cannot be set. The registers of page 3 are not NE2000 compatible and do not need to be set. The registers that need to be initialized include CR, DCR, PBCR, PStart, PStop, ISR, IMR, Par0~Par5, Mar0~Mar7, Curry, TCR, RCR and other registers. The initialization function mainly needs to complete the following tasks. (1) Call the reset subroutine to reset the RTL8019AS. There are two reset methods: one is hardware reset, which is achieved by pulling the reset pin high and low to reset the RTL8019AS; the other is software reset, which is achieved by reading and writing data to the if port to reset the RTL8019AS. (2) Write 0x21h to the command register cr to put the RTL8019AS in stop mode and set the register. (3) Set the data configuration register dcr to use FIFO buffer, normal mode, 8-bit data transmission mode, with the byte order being high byte first and low byte last. Set rbcr0 and rbcr1 registers to 0, that is, the number of RAM bytes to read. (4) Set the start and end addresses of the receive and transmit buffers. pstart is the start page address of the receive buffer 0x46; pstop is the end page address of the receive buffer 0x80; bnry is the pointer to the last page that has been read 0x46; tpsr is the start address of the transmit page 0x40; curr is the chip write memory pointer, which points to the next page of the page currently being written, that is, it points to 0x47 during initialization. (5) Set the RCR receive configuration register to 0xcc, use the receive buffer, only receive data packets of its own address (and broadcast address data packets) and multicast address packets, discard packets smaller than 64 bytes, and do not receive data packets with check errors. Set the TCR transmit configuration register to 0xe0, enable automatic CRC generation and automatic verification, and work in normal mode. (6) Set Mar0~Mar8 to 0 to clear the multicast address register; set ISR to 0xff to clear the interrupt status register; set the interrupt mask register IMR to 0 to mask all interrupt requests. (7) Write the physical address to the Par0~5 physical address registers. (8) Finally, set the TCR transmit configuration register to 0xe0; set the command register CR to 0x22, the chip enters normal working state, and the RTL8019AS initialization is completed. During initialization, it is necessary to specify the 48-bit hardware address and broadcast address of the embedded device, and correctly set its IP address, subnet mask and default gateway. Industrial control is generally carried out within a local area network of the same level, so the IP address of the gateway can be directly set to 0. Its main control flow is shown in Figure 4.
4. Conclusion This paper analyzes the composition of embedded devices and Ethernet interfaces, briefly introduces the RTL8019AS and C8019F chips, and presents the hardware connection and software design of the embedded MCU and Ethernet control chip. This design, using data acquisition as an example, has significant practical implications for industrial production.
