Design of a motor drive control system based on IR21844
2026-04-06 07:22:04··#1
Introduction The increasingly widespread application of electric motors has made their drive control a hot research topic. With the widespread use of power VMOS devices and insulated-gate bipolar transistors (IGBTs), bridge circuits composed of VMOS or IGBT devices are increasingly used in various applications, such as half-bridge or full-bridge converters for switching power supplies, bridge drive circuits for brushless DC motors, stepper motor drive circuits, and inverter circuits for inverters. IR (International Rectifier) provides a variety of bridge drive integrated circuit chips. This article introduces the application of the IR21844 power drive integrated chip in a bridge drive circuit for a brushless DC motor. This chip is a monolithic integrated drive module with dual-channel, gate-driven, high-voltage, high-speed power devices. It employs highly integrated level conversion technology, greatly simplifying the control requirements of the logic circuit for the power devices and improving the reliability of the drive circuit. In particular, the use of an external bootstrap capacitor for the upper transistor significantly reduces the number of drive power supplies compared to other IC drivers. For a typical three-phase bridge inverter consisting of 6 transistors, using 3 IR21844 chips to drive 3 bridge arms requires only one 10-20V power supply. This significantly reduces the size of the control transformer and the number of power supplies required, lowers product costs, and improves system reliability. 1. Main Features and Technical Parameters of IR21844 Compared with currently used integrated driver chips, the IR21844 integrated driver chip has the following features: This chip has a standard 14-pin monolithic structure, as shown in Figure 1; It has a floating intercept power supply for bootstrapping operation, with a high-side operating voltage up to 600 V, a du/dt interference immunity of 50 V/ns, and a static power consumption of 1.6 W at 15 V; The output gate drive voltage range is wide, from 10 to 20 V; The IR21844 is manufactured using CMOS technology, with the logic circuit and power circuit sharing a single power supply, ranging from 10 to 20 V, adaptable to TTL or CMOS logic signal input; It uses a CMOS Schmitt trigger input to improve the circuit's anti-interference capability; It has two independent output channels, one high-side and one low-side, both with hysteresis undervoltage lockout; It allows an offset of 5 to +5 V between the logic circuit reference ground (VSS) and the power circuit reference ground (COM); The dead time is adjustable. In Figure 1, pin 1 (IN) is the logic input control terminal; pins 6 and 12 are two independent outputs, L0 (low-side output) and H0 (high-side output), respectively; pins 7 and 13 are VCC (low-side power supply voltage) and VB (high-side floating power supply voltage), respectively; pin 5 (COM) is the low-side power supply common terminal; pins 11 and 3 are VS (high-side floating power supply common terminal) and VSS (logic circuit ground terminal), respectively; pin 2 (SD) is the output shutdown control terminal; pin 4 (DT) is the adjustable dead time input terminal. Recommended typical operating parameters are listed in Table 1, and dynamic propagation delay time parameters are listed in Table 2. [align=center] [/align] 2 Typical Application Circuit Figure 2 shows a typical application circuit for the IR21844. Vcc is connected to the power supply terminal, providing power to the logic components and power devices; IN is connected to the input control signal, typically a PWM signal; the waveforms of the output terminals HO and LO are logically the same as and opposite to the input waveform at IN, respectively, with a certain amplification (10-20 V). The input/output timing diagram is shown in Figure 3; when SD is connected to a low level, H0 and LO output normally; when connected to a high level, both output terminals are blocked; DT is the dead time adjustment terminal. Because the upper and lower transistors of the same bridge circuit cannot be turned on simultaneously, otherwise it will cause a short circuit, a dead time is required. Since the output logic of H0 and LO is opposite, logically speaking, it will not cause shoot-through, but it is still possible to cause shoot-through at the moment of commutation. A resistor Rdt can be connected externally to DT, and the dead time can be adjusted by adjusting the resistance value; at the same time, the turn-on delay time is 680 ns, which is greater than the turn-off delay time of 270 ns, thus avoiding bridge shoot-through. The typical dead time value is 5μs (as listed in Table 2). [align=center] [/align] In Figure 2, C2 is the bootstrap capacitor. During the period when T2 is on and T1 is off, VCC charges C1 through D1, C1, the load, and T2 to ensure that when T2 is off and T1 is on, the gate of transistor T1 is driven by sufficient energy stored in C1. This is the bootstrap power supply on the high end. If the load impedance is large, C2 will charge slowly through the load, so that when T2 is off and T1 is on, the voltage on C2 is still not charged to the bootstrap voltage of 8.3 V or higher. In this case, the output drive signal will be blocked by the on-chip logic due to undervoltage, and T1 will not work properly. Therefore, the selection of C2 is very important. Generally, one large capacitor and one small capacitor are used in parallel. In the operating state of about 20 kHz, a 1.0μF and a 0.1μF capacitor are used in parallel. The parallel high-frequency small capacitor is used to absorb high-frequency glitches and interference voltages. When driving large-capacity IGBTs at low operating frequencies, attention must be paid to the stability of the bootstrap capacitor voltage. If the peak of the upper transistor's drive waveform shows a drop, a larger capacitor should be selected. Clearly, T1 switches once per cycle, and C2 charges once through T2. Therefore, the charging of the bootstrap capacitor C2 is also related to the PWM pulse frequency and pulse width of the input signal IN. When the PWM operating frequency is too low, if the T1 conduction pulse width is narrow, the bootstrap voltage of 8.3 V is easily met; otherwise, bootstrapping cannot be achieved. Therefore, the PWM switching frequency and duty cycle adjustment range should be set reasonably. The following points should be considered when selecting the capacitance of C2: ① For high PWM switching frequencies, a small capacitor should be selected for C2. ② The bootstrap power-on circuit should avoid passing through a high-impedance load as much as possible; otherwise, a fast charging path should be provided for C2. ③ For applications with large duty cycle adjustments, especially at high duty cycles, the T2 conduction time is short, and a small capacitor should be selected for C2. Otherwise, the bootstrap voltage cannot be reached within a limited time. ④ The selection of C2 should comprehensively consider various PWM changes. Monitoring the waveforms of H() and VS pins for debugging is the best method. According to Table 1, the maximum value of VB above VS voltage is 20 V. To avoid VB overvoltage damaging IR21844, a Zener diode D1 is added to the circuit. The function of D2 in the circuit is to prevent high voltage from entering the VCC terminal when T1 is turned on and damaging the chip. Therefore, its withstand voltage must be higher than the peak bus voltage, so a fast recovery diode with low power consumption is used. The capacitor C3 connected to the VCC terminal is a decoupling capacitor used to compensate for the inductance of the power line. 3 Improvement of the MOSFET driver circuit As shown in Figure 2, a typical application circuit is a half-bridge driver circuit composed of IR21844 driving two N-channel MOSFETs or IGBTs. The fixed gate reference output channel (L0) is used for the power MOSFET T2 connected at the lower end, and the floating gate output channel (HO) is used for the power MOSFET T1 connected at the upper end. Taking the driving of an N-channel MOSFET as an example, this will be introduced. Power MOSFETs are voltage-driven devices with no minority carrier storage effect, high input impedance, and therefore high switching speed, low drive power, and simple circuitry. However, power MOSFETs have relatively large inter-electrode capacitance, as shown in Figure 4. The relationship between the input capacitance Ciss, output capacitance Coss, feedback capacitance Crss, and inter-electrode capacitance can be expressed as: IR21844 cannot generate negative bias. If used to drive a bridge circuit, due to the inter-electrode capacitance, the gate-drain capacitance CGD has charging and discharging currents during turn-on and turn-off, which can easily cause interference on the gate. To address this deficiency, diodes (D3 and D4) can be connected in anti-parallel to the gate current-limiting resistors (R1 and R2), respectively. These diodes can accelerate the discharge rate of the charge on the inter-electrode capacitance. The gate-source drive voltage of power devices is generally at the CM ( )S level (5-20 V), therefore, a protection circuit must be added to the gate. In the circuit, Zener diodes D5 and D6 limit the applied gate voltage, and resistors R1 and R2 divide the voltage, thus reducing the gate voltage. Power devices T1 and T2 generate surge voltages during switching, which can damage the components. Therefore, Zener diodes D5 and D6 are used in the circuit to clamp the surge voltages. 4. Extension and Summary The above describes the usage and precautions of the IR21844 when driving a single-phase circuit. Similarly, this chip can be used to drive two-phase, three-phase, or multi-phase circuits. The circuit can be replicated; however, the determination of some parameters needs to be based on the analysis in this article and the specific actual situation. Because this chip has only one input and two complementary outputs, it is very suitable for driving bridge circuits; furthermore, its dead time can be flexibly adjusted, and the output locking terminal can be flexibly used for closed-loop current control, greatly facilitating control design. Therefore, it is widely used in small and medium-sized power applications.