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Development of a PC/104 Pulse Altimeter Integrated Detection System

2026-04-06 03:51:09 · · #1
Abstract: This paper firstly analyzes the check-up requirements of the РВ-21 and WG-6 echo altimeters. Then, an automatic detection system based on a PC/104 embedded computer as the control core is constructed. The hardware and software design and implementation methods of the system are given. Keywords : military pulse echo altimeter; PC/104; CPLD; multi_thread 1 Introduction The integrated altimeter detection system is an automatic detection system for domestically produced and Russian-made military pulse altimeters. This detection system can perform comprehensive performance checks and debugging of airborne altimeter systems (including the PB-21 altimeter system and the two-seater WG-6 altimeter system), and is an essential detection equipment for aircraft overhaul plants. It can transfer the power-on inspection of the aircraft altimeter system to a test bench, facilitating comprehensive system testing using various methods; it can also perform qualitative inspections and troubleshooting of individual devices, providing convenient testing methods for the military and factories. 2. Introduction to the Integrated Altimeter Testing System The integrated altimeter testing system uses a PC/104 industrial control computer as its core. It connects to interface boards with different functions via the PC's address and data buses to complete the entire testing process through a combination of automatic and manual testing. The system's functions are shown in Block Diagram 1. [align=center] Figure 1 Block Diagram of the Testing System[/align] Many testing items are the same or similar for both altimeters. The focus and difficulty of the design should be placed on the design of the РВ-21 altimeter testing section. Some parts of the two testing designs can be reused, such as the speed/range simulation unit module and the voltage measurement A/D module. In the software design, two testing interfaces were designed separately, and testing programs were written according to the different test items and testing procedures. In terms of testing design, in addition to completing all individual tests, continuous testing of multiple testing items has been added, and functions such as saving, viewing, and printing of test results are provided. 3 System Hardware Circuit Design 3.1 System Composition and Function The hardware part of the tester mainly consists of several parts, including a PC/104 core control system, a serial-to-parallel code conversion unit, a test combination unit, a rate/range simulation unit, and a voltage measurement unit. The serial-to-parallel code conversion unit mainly converts the 32-bit serial code from the PB-21 altimeter (or the 32-bit analog serial code generated by the test combination unit) into parallel binary code. One path is processed by the PC/104 and sent to the display unit for display, while the other path is sent to the test hole for manual inspection of the code level. The test combination unit consists of two parts: a serial code simulation circuit and a decoding circuit. The serial code simulation circuit simulates the 32-bit serial code generated when the PB-21 altimeter is working, and the decoding circuit sends the parallel binary "address" code from the serial-to-parallel code conversion unit to the address signal decoder to form an address signal. The rate/range simulation unit is mainly used to simulate the rate and altitude range of the distance measurement pulse delay change output by the PB-21 altimeter (or WG-6 altimeter). The voltage measurement unit mainly samples the measured voltage signal, sends it to the analog-to-digital converter circuit, and after conversion, the data is sent to the PC/104 control system via the PC-104 bus. After appropriate optimization processing, it is sent to the display unit for direct digital display. 3.2 CPLD Implementation of Serial-to-Parallel Code Conversion The serial-to-parallel code conversion unit circuit mainly converts the 32-bit bipolar serial code from the PB-21 altimeter or generated by the integrated detector into parallel binary code. The serial-to-parallel code conversion unit circuit includes several parts such as a beat pulse generation module, a code pattern conversion module, a frequency division module, a carry pulse and clear pulse extraction module, a shift register, and a storage register. As shown in Figure 4, after the 32-bit bipolar code is filtered by the circuit into unipolar codes a and b, the a and b codes are ORed to form a 50KHz continuous beat pulse. Under the trigger of the clock pulse, the input data is sequentially sent to the shift register. Under the trigger of the carry pulse, the data is stored in the memory register after passing through the shift register. Then, the data is sent to the PC/104 for processing via the data bus and then displayed on the display unit. [align=center]Figure 2 Serial-to-Parallel Conversion Unit Design Structure Diagram[/align] The jpmc (clock pulse) and fzmc (auxiliary pulse) in the "Carry Pulse and Clear Pulse Extraction Module" use an 8-bit counter to count the 4-bit interval. The 5th bit of the count forms jwmc (carry pulse), and the 8th bit forms qlmc (clear pulse). Under the trigger of jpmc, 32 bits of serial data are sequentially sent to the shift register. Then, under the trigger of jwmc, the data in the shift register is sent to the memory register in parallel, forming a 32-bit parallel code. Finally, under the triggers of jpmc and qlmc, the "shift register" is cleared, waiting for the input of the next 32 bits of data. Figure 3 shows the simulation waveform of the serial-to-parallel code conversion. 3.3 Design of the Rate/Range Simulation Unit The range adjustment enables programmable distance adjustment of the altimeter's ranging range. When simulating the rate, a programmable device and a digital-to-analog converter (DAC) are used to generate a frequency-adjustable triangular wave voltage generator. By adjusting the frequency of the triangular wave, the rate of change of the ranging pulse delay can be adjusted. A single D/A converter (AD569 from Analog Devices, Inc.) is used in both the rate and range simulation circuits. Figure 4 shows the block diagram of the control circuit design. The main design concept of the entire control circuit is to digitize the analog signal. [align=center] Figure 3 Serial-to-Parallel Code Conversion Simulation Diagram Figure 4 Block Diagram of the Control Circuit[/align] When performing range simulation, the D/A conversion circuit receives 16-bit programmable data input from the computer; when performing rate simulation, the D/A conversion circuit receives 16-bit data input from the counter. 3.4 Design of the Voltage Measurement Unit The voltage measurement unit is mainly used to measure the voltage required by the PB-21 altimeter (or WG-6 altimeter) and return the measurement data to the PC/104 core control system in a timely and accurate manner. After processing by the PC/104, the data is sent to the display unit for real-time display. Voltage Measurement Unit. Figure 5 shows the voltage measurement principle diagram. [align=center] Figure 5 Voltage Measurement Principle Diagram[/align] Taking the measurement of AC 115V voltage as an example, the measurement process is briefly explained. When measuring AC 115V voltage, the computer first issues a command to control the relay group to connect the 115V voltage to the measurement circuit. Then, the computer performs AC/DC judgment and issues a command to turn on the AC switch. The AC 115V voltage is connected to the AC sampling circuit. The sampled AC voltage is sent to the AC/DC conversion circuit to complete AC/DC conversion and filtering. The converted DC voltage is sent to the A/D converter for analog-to-digital conversion. The data after analog-to-digital conversion is sent to the computer via the PC-104 bus interface for correction and processing, and finally sent to the display unit for real-time display. 4. Software System Design The Borland C++Builder 6.0 software development environment was adopted. Under the object-oriented development philosophy, the software's reliability, effectiveness, intelligence, and automation were emphasized. In addition to covering all equipment in the overhaul testing system, some important auxiliary testing functions were added, such as report printing, operation permission mechanisms, and process parameter standard definitions. 4.1 Human-Machine Interaction Section After entering the main scheduling program, two testing interfaces were designed for the РВ-21 altimeter and WG-6 altimeter testing respectively. Each main management program can be roughly divided into several parts, including operation interface design, status signal detection module, control signal generation module, database management module, display management module, and hardware operation module, as shown in Figure 6. [align=center] Figure 6 Testing Software Structure Diagram[/align] Functional options were designed under each main module according to the testing requirements. Functional code was written for each module, and PC/104 addresses and data ports were assigned to the functional testing items in each module to form subroutines. The main program then uses the method of calling subroutines to complete the entire software. 4.2 The multi-threaded detection design software adopts a multi-threaded structure, which allows external detection to run continuously, and data is measured and displayed through the execution of sub-threads. A new class TThreadReadMeter, inherited from the TThread class, is created and an instance is created. Then, a function is written to complete the detection of the 32-bit serial code (or 16-bit parallel code) information transmitted from the РВ-21 altimeter and the real-time display of the status information of the РВ-21 (or WG-6) altimeter. Similarly, a new class TThreadReadVol, inherited from the TThread class, is created and an instance is created. A function is written to complete the real-time measurement and display of the voltage signals to be measured in the detection project. Therefore, three threads are designed in the detection process: (1) Main thread: provides a user-friendly human-machine interface, responds to user operation instructions, and centrally displays various measurement information; (2) Altitude and status information measurement thread: receives the 32-bit serial code and 16-bit parallel code and status instructions from the altimeter after conversion through the data interface board, converts them into altitude and status information according to a certain formula, and displays them on the operation panel in real time; (3) Voltage and current measurement and display detection thread: measures the voltage signals to be measured in real time during the detection and displays them on the operation panel. 4.3 Interface Design Considering the complexity of hardware access in this testing system, this paper uses basic C language for hardware port access. This is because the software operations on the hardware are limited to reading and writing to the ports, without complex operations such as DMA or interrupts. Therefore, as long as the address is correct, access security can be guaranteed. The program for reading and writing the I/O port bus is as follows: Write I/O port: Port address is 380, nData380 is the data variable to be written to the port: _Outp(0x380, nData380); Read I/O port: Port address is 386, the data read from the port is assigned to the variable nData386: _Inp(0x386, nData386); 5 Conclusion The integrated testing instrument uses a PC/104 embedded computer as a platform and adopts PC-104 bus technology, giving the system advantages such as easy expansion and upgrading of software and hardware design. The digital circuit design in the hardware circuitry utilizes VHDL and FPGA devices, reducing circuit design complexity and improving system integration and anti-interference capabilities. Leveraging the advanced technology of C++ Builder 6.0, continuous automatic detection of multiple items is achieved beyond single-item testing, thus improving detection efficiency. References [1] Jie Hua. Design and implementation of digital circuit and detection software for WG-6 altimeter detector [D]. Xi'an: Air Force Engineering Academy, 2003. [3] Li Jianhai, Bi Duyan, Chen Gaoping. Integrated radio navigation system (Volume 1) [M]. Xi'an: Air Force Engineering Academy, 2002. [3] Deng Mingwu, Deng Yong, et al. Principles of radio equipment (WG-6 radar altimeter) [M]. Xi'an: Air Force Engineering Academy, 1996. [4] Zhao Shuguang, et al. Principles, development and application of programmable logic devices [M]. Xi'an: Xi'an University of Electronic Science and Technology Press, 2001. [5] Zhao Shixia, Yang Feng, Liu Jiesheng. VHDL and microcomputer interface design [M]. Beijing: Tsinghua University Press, 2004. [6] Cheng Zhanpeng. Analysis of Borland C++Builder 6.0 application development technology [M]. Beijing: Tsinghua University Press, 2003. [7] Xia Wanlin, Li Qing, Liu Zhidong. Automatic testing instrument for a rocket based on embedded PC/104 computer [J]. Microcomputer Information, 2006, 2(2): P109-110
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