Compared to ordinary video signal acquisition, the biggest advantage of CCD image data acquisition is its high data transmission rate and multiple transmission channels. Currently, the common method for CCD image data acquisition involves inserting a high-speed data acquisition card into a computer. Data transmission between the acquisition card and the CCD camera occurs via a point-to-point physical layer interface (such as RS-422 or RS-485). The high-speed data acquisition card receives the data and writes it to the computer's memory via the PCI bus. Then, using the acquisition card's storage function, the data is written to the computer's hard drive via the IDE interface. While this method is simple and reliable, it has limitations in data transmission and storage for multi-channel, high-speed image data acquisition. It is prone to data frame loss, and with the increase in transmission channels, the number of transmission wires increases, leading to increased system power consumption and noise. Universal Serial Bus (USB) effectively solves these problems. It offers advantages such as convenient connection, no external power supply required, plug-and-play functionality, hot-swapping support, high bandwidth, low power consumption, low cost, dynamically loaded drivers, and the ability to expand the number of peripherals through a cascaded star topology. It enables simple, fast, bidirectional, and reliable connection and communication between the host computer and the data acquisition system. 1. Hardware Design The system design should possess characteristics such as stability, flexibility, and versatility. Stability refers not only to ensuring lossless data transmission but also to ensuring continuous, frame-free data storage. Flexibility is reflected in the modularity and reconfigurability of the system's signal input channels, storage capacity, and disk connection methods, allowing the system to be adapted for the acquisition of other high-speed video images. Versatility is reflected in the system's ability to adapt to the acquisition of CCD image data from multiple channels at different rates, requiring the system to achieve channel merging and have a wide data transmission bandwidth. The hardware structure diagram of the USB data acquisition system is shown in Figure 1. The analog signal output from the sensor is selected by a multiplexer and input to a signal amplifier. The signal amplifier automatically adjusts the gain to amplify the input signal within the range of the A/D converter. Then, the ARM chip controls the A/D conversion, and the converted digital signal is sent to the embedded microcontroller. The signal is then transmitted to the PC for data processing via the USB interface circuit. Simultaneously, the control signals from the client application on the PC are transmitted to the data acquisition system based on the ARM chip via the USB interface. 1.1 Solution Selection 1.1.1 Selection of USB Interface Chip and Host Controller Chip There are two types of USB controllers: one is a microcontroller with an integrated USB interface, such as Cypress's EZ-USB (based on 8051) series chips CY7C68013 and CY7C64613; the other is a standalone USB controller, such as Philips' PDIUSBD12 and ISP1581, NetChip's NET2888, and National's USBN9603 and USBN9604. While the former type of chip is simple to program, it requires a dedicated development system, resulting in a larger investment, and the microcontroller's performance is limited. The latter is characterized by its low price, convenient connection, and high reliability, but it does not have an on-chip CPU, requiring a microprocessor for protocol processing and data exchange. This system selected the ISP1581, a cost-effective USB 2.0 controller chip without an on-chip CPU. It fully complies with the USB 2.0 specification and can reach speeds of up to 480Mbps. The ISP1581 can be used to quickly develop high-performance USB 2.0 devices; at the same time, to meet speed requirements, the high-performance, low-power ARM chip S3C44B0X was selected as the host controller chip. 1.1.2 Selection of Signal Amplification Circuit and A/D Conversion Chip In high-speed data acquisition systems, the field input signal is a high-frequency analog signal with a large variation range. If a single gain amplification is used, the amplitude of the amplified signal may exceed the range of the A/D converter. Therefore, the amplifier gain must be adjusted accordingly based on the signal variation. This system selected the AD8321, a high-frequency analog signal conditioning chip with wide bandwidth, low noise, digitally controllable gain, and is very suitable for pre-amplification in data acquisition systems. After the high-frequency analog signal is amplified, it is sent to the analog-to-digital converter. Although the S3C44B0X itself integrates 8 channels of 10-bit ADC, its internal integrated A/D converter can only accept analog signals from 0 to 100Hz and lacks a sample-and-hold circuit. Therefore, it needs to be expanded. To meet the requirement of 8-channel acquisition, the high-speed A/D converter chip AD7829 was selected, with a maximum conversion rate of 2MSPS and a conversion time of 420ns. 1.2 Hardware Interface Circuit The hardware interface circuit connection of this system is shown in Figure 2. This system utilizes the PD port of the S3C44B0X as a bidirectional port for expansion. The CONVST pin of the AD7829 is connected to the PD1 pin of the S3C44B0X to generate conversion pulses; the EOC pin of the AD7829 is connected to the PD0 pin of the S3C44B0X to generate a conversion end signal. After the acquired signal is converted by the A/D converter, the data is first stored in the register of the S3C44B0X. The S3C44B0X first sends a control signal and then sends the data to the ISP1581. Here, the buffer of the ISP1581 is defined as 8, and the 8 channels of converted data are written to them respectively. The PC connects to the ISP1581 via a USB interface. The ISP1581 is responsible for classifying and interpreting signals sent by the PC. The specific operation process is as follows: Data sent by the PC to the USB device is written into the ISP1581's buffer in the form of packets. When the buffer is full or the data transmission is complete, the ISP1581 sends an interrupt signal to the ARM. The ARM responds to the interrupt signal and enters the interrupt service routine to execute the corresponding packet processing. On the other hand, the USB device cannot actively send data to the host. Only when the PC requests the USB device to send data will the ARM write the data required by the host into the buffer of the corresponding endpoint of the ISP1581. 2 Software Design 2.1 Data Acquisition Section Data acquisition is performed by the S3C44B0X emitting pulses from its PD port as the conversion pulse CONVST for the AD7829. When the AD7829 finishes conversion, the EOC output is valid low. After receiving the valid level, the S3C44B0X sends the next address and then reads the data. When the AD7829's sum signal is valid, the address of the next channel is entered simultaneously with the data read into the S3C44B0X's data buffer. This process continuously acquires 8 analog inputs until data acquisition is complete. The flowchart of this process is shown in Figure 3. 2.2 USB Software Design The USB system software consists of three parts: firmware, USB system driver, and application program. 2.2.1 Firmware Development The firmware is actually a program file located inside the microcontroller, used to assist the hardware in completing communication tasks. It is connected to the S3C44B0X's EINT0 interrupt port via the INT interrupt signal of the ISP1581. An interrupt is generated when data is successfully received or sent. The firmware's task is to respond to these interrupts, complete the device configuration, inform the USB driver of the device's capabilities, receive data from the USB host controller, and send data to the host. The device firmware is the core of the device's operation. This system is written in Keil C. The SP1581 firmware adopts a modular design, including four parts: the main loop program, the interrupt service routine, USB standard request processing, and batch data transfer request processing. The firmware module structure is shown in Figure 4. 2.2.2 Application Programs Application programs include Win32 DLL programs and user applications. The Win32 dynamic link library contains binary files of shared function libraries, which can be used by multiple applications simultaneously. Client applications are software programs that implement the functions of the data acquisition system, and in this system, they are written in Visual C++. 2.2.3 USB System Drivers The USB system driver adopts a layered architecture model (WDM). This model defines layered drivers. The USB device driver does not directly communicate with the hardware, but submits USB request blocks to the bus driver through the USB driver interface to complete hardware operations. From the system's perspective, after the USB device is plugged into the host, the host detects the USB device, reads the device descriptor, and then, based on the vendor ID and product ID provided in the device descriptor, enables the corresponding USB device driver, reads the configuration descriptor, interface descriptor, and endpoint descriptor in the USB device, selects the appropriate configuration, interface, and endpoint as needed, and determines the transmission method. After this process is completed, data transfer can occur between the PC and the USB device. The characteristics of the USB bus make it very suitable as a communication interface between small instruments and the host, enabling a simple, fast, and reliable connection between the host and portable instruments. Applying a USB interface to a data acquisition system improves its speed, enhances its anti-interference capabilities, and increases the reliability of data transmission. This paper details the hardware and software design and development scheme of a data acquisition system based on the ARM chip S3C44B0X and the USB 2.0 interface control chip ISP1581. The design and development process is quite complex, involving the combined use of various software programs and hardware circuits. Experimental testing shows that the system performs well. [b]References[/b] [1] Luo Hao, Yang Xiaofei. Design of offline data acquisition system[J]. Microcomputer Information, 2006, 22(4): 93-95. [2] Gao Meizhen, Hong Jiaping. Data acquisition system based on USB interface and embedded chip bus[J]. Instrumentation Technology and Sensors, 2005, (8): 51-53. [3] Xing Wei, Liu Kaihua. Design of USB2.0 interface for data acquisition system[J]. Electronic Measurement Technology, 2006, 29(1): 12-13. [4] Xia Yimin, Wang Guangjun. High-speed data acquisition system based on USB bus[J]. Foreign Electronic Components, 2003, (10): 20-23.