With the continuous development of computer vision and image processing technologies, computer vision and video inspection technologies have been widely applied in many fields such as industrial control, intelligent transportation, and equipment manufacturing. Traditional video inspection often uses an industrial control computer (ICC) as its video processor to implement its functions. This method often fails to achieve simultaneous video inspection from different directions due to the processing speed limitations of the ICC, and because the video inspection process requires a significant amount of processing time, it cannot achieve real-time remote control functionality. Currently, in remote control and communication, communication platforms based on DOS and Windows operating systems are widely used. However, DOS, as a single-tasking operating system, cannot meet the requirements of multi-tasking and real-time processing; while Windows, as a window-based operating system, cannot match the stability and real-time performance of real-time multi-tasking embedded operations. This paper proposes an embedded system design method using a DSP as the video inspection processing chip and Linux as the operating system. 1 System Structure The development of this system mainly includes two parts: the design of the video inspection card and the x86 communication platform. The video detection card mainly consists of three parts: analog image acquisition, conversion, and DSP video detection. Each exchange parameter detection card expands the PCI bus interface and plugs into the PCI bus slot of the communication development platform, exchanging data with the communication platform via the PCI bus. The communication platform handles the communication issues of multiple traffic parameter detection cards, transmitting the video detection data from the video detection cards via the PCI bus to the control center in real time through the network. The functional block diagram of the system is shown in Figure 1. According to the system design requirements, the video detection card function is mainly divided into five parts: analog image acquisition, analog image A/D conversion, data buffering, and DSP video detection. The video detection card flowchart is shown in Figure 2. This system uses PhilIPs' SAA7111A to implement analog image A/D conversion. This chip can realize functions such as multiplexing, phase-locked loop and timing, clock generation and testing, ADC, and luminance/color separation. Its output can have the following formats: YUV 4:1:1 (12-bit), YUV 4:2:2 (16-bit), YUV 4:2:2 (CCIR-656) (8-bit), etc. Due to the different timing of the DSP processing chip and the SA7111A, data buffering can be achieved through logic control of the FIFO using a CPLD. The DSP is the core of real-time signal processing. This system uses the TI DSP chip—TMS320C6211. This chip belongs to the C6000 fixed-point series, and the C6211 offers the best price-performance ratio within this series. The C6211 processor consists of three main parts: the CPU core, memory, and peripherals. Integrated peripherals include an EDMA controller, External Memory Interface (EMIF), Host Port (HPI), Multichannel Buffer Interface (McBSP), timers, interrupt selectors, a JTAG interface, PowerDown logic, and a PLL clock generator. SDRAM is expanded through the EMIF interface, while the PCI bus control chip is expanded through the HPI interface. The PCI9050 interface chip for the PCI bus mainly includes the PCI bus signal interface and the local bus signal. In hardware design, the local bus signal interface only needs to be connected to the DSP's HPI interface via level conversion, and the PCI interface can be expanded to complete the hardware circuit design. 2. Embedded System Design of the Communication Development Platform The communication development platform uses x86 as the core device, expands the PCI bus, and realizes the connection between x86 and the Internet through modem dialing. 2.1 PCI Bus Device Driver PCI devices have three physical spaces: configuration space, memory space, and I/O space. The configuration space is a 256-byte connection space, defined as shown in Figure 3. The read-only space in the configuration space contains the device identifier, vendor code, version number, category code, and header type. The vendor code identifies the device vendor; the device identifier identifies a specific device; the version number identifies the device's version number; the category code identifies the device type; and the header type identifies the header type and whether it is a multi-function device. Except for the vendor code, the values ​​of the other fields are assigned by the vendor. The command field register provides control command words for device responses; the status field records PCI bus-related events (see reference 4 for detailed command control and status reading methods). The most important function of the base address register is to allocate the system address space for PCI devices. In the base address register, bit 0 is used to identify whether it is memory space or I/O address space. When the base address register is mapped to memory space, bit 0 is "0", and when mapped to I/O address space, bit 0 is "1". Other contents in the base address space are used to represent the starting physical address of the PCI device address space mapped to the system space. The size of the address space is obtained by writing all "1"s to the base address register and then reading its base address value. The PCI device driving process mainly includes the following steps. First, PCI device lookup. Embedded operating systems typically provide corresponding API functions. In Linux, the function `pcibios_find_device(PCI_VENDOR_ID, PCI_DEVICE, index, &bus, &devfn)` can find the nth (index+1)th device with vendor code PCI-ID and device identifier PCI-DEVICE, returning the bus number and function number, stored in `bus` and `devfn` respectively. The second step is PCI device configuration. The operating system's API functions access the PCI device's configuration space to configure the PCI device's base address register, interrupts, ROM base address register, etc. This allows obtaining the PCI memory space, I/O address free mapping, and the device's interrupt number. In Linux, API functions for accessing the PCI device's configuration space include `pcibios_write_config_byte` and `pcibios_read_config_byte`, which perform read and write operations on the PCI device's configuration space, respectively. Step 3: Based on the configuration parameters of the PCI devices, write initialization programs, interrupt service routines, and access programs for the PCI device's storage space for different devices. 2.2 Establishment of Remote Control and Communication Links The main data link methods for connecting to the Internet are Ethernet and serial communication. Ethernet connection is a local area network (LAN) connection method widely used for connecting local computers. Serial communication via modem dial-up connection can achieve long-distance data communication. The serial communication interface protocol methods are described in detail below. Serial communication protocols include SLIP, CSLIP, and PPP communication protocols. SLIP and CSLIP provide a simple way to encapsulate IP datagrams through serial communication, connecting to the Internet via an RS232 serial interface and a demodulator. However, this simple connection method has many drawbacks, such as each end not knowing the other's IP address; the data frame lacks a type field, meaning that one serial line used for SLIP cannot simultaneously use other protocols; SLIP does not add a checksum to the data frame, so when errors occur due to line noise affecting the SLIP transmitted message, they cannot be detected at the data link layer and can only be discovered through upper-layer protocols. PPP (Point-to-Point Protocol) addresses shortcomings in the SLIP protocol. PPP comprises three parts: a method for encapsulating IP datagrams on a serial link; a Link Control Protocol (LCP) for establishing, configuring, and testing data links; and a Network Control Protocol (NCP) for different network layer protocols. PPP offers many advantages over SLIP, including support for cyclic redundancy detection, dynamic IP address negotiation between communicating parties, compression of TCP and IP packets, and support for authentication protocols (CHAP and PAP). Figure 4 shows the format of a PPP data frame. PPP implementation can be accomplished through two background tasks: a protocol control task and a write task. The protocol control task manages various PPP control protocols, including LCP, NCP, CHAP, and PAP. It handles connection establishment, connection mode negotiation, user authentication, and connection termination. The write task controls data transmission by the PPP device. The datagram transmission process involves writing data to the serial interface device via the write task. When a datagram is ready, the PPP driver activates the write task via a semaphore, enabling the data transmission to the serial interface device. The PPP receiver program is implemented by adding a "hook" program to the serial communication device driver. After the serial communication device receives a data packet, the interrupt service routine (ISR) of the device calls the PPP ISR. When a correct PPP data frame is received, the PPP ISR calls the PPP input program through the scheduler. The PPP input program then reads the entire PPP data frame from the serial device's data buffer and processes it according to the PPP data frame rules, that is, placing it into the IP input queue or the protocol control task input queue. PPP is now widely accepted by various ISPs (Internet Service Providers), and the Linux operating system fully supports the PPP protocol. During the network configuration process under Linux, a physical connection with the ISP is established through a modem, and then the PPP device is added to the interface. The ISP's phone number, username, and password are entered, and the local IP and remote IP are set to 0.0.0.0. The `/ETC/PPP/OPTION` is modified by adding `DEFAULTROUE`, allowing the ISP to provide the default route. This completes the PPP data link setup process for the device, enabling remote control via the Internet. Conclusion This design method has been successfully applied to the traffic parameter detection system of an intelligent switching system. In this system, four DSP video detection cards are used to detect traffic parameters in four different road areas. Linux is used as the operating system for the communication platform. A connection with the monitoring center is established via the PPP protocol, enabling the monitoring center to remotely control each video detection card. The embedded system design proposed in this paper, which integrates video detection and remote control, fully utilizes the high-performance data processing capabilities of DSPs and the real-time stability of the embedded operating system. The PPP protocol is used to establish a connection with the Internet, enabling remote control of video detection. This combination of DSP signal processing and embedded systems has broad application prospects in video detection fields such as industrial control, product manufacturing, and intelligent transportation. Editor: He Shiping