Fiber optic gyroscopes are a type of laser gyroscope, a product of the close integration of inertial technology and optoelectronic technology. They utilize the Sagnac interference effect, forming a ring optical path with optical fibers, and detecting the phase difference between two superradiant beams generated as the fiber ring rotates, thereby calculating the angular velocity of the fiber ring's rotation. A fiber optic gyroscope mainly consists of two parts: a meter head and a modulation/demodulation circuit. The modulation/demodulation circuit, servo-on the meter head, transforms the input electrical signal and generates a feedback signal, which is then sent to the phase modulator of the meter head. In practical applications, the corresponding modulation/demodulation circuit should be modified according to temperature, vibration, and other conditions to maximize the gyroscope's accuracy requirements. This paper designs an FPGA-based test system to simulate the meter head of a fiber optic gyroscope and test the performance of the modulation/demodulation circuit. The basic principle and structure of the simulated meter head : The main function of the meter head is to convert the phase change caused by the optical path difference due to the Sagnac effect into a change in optical power through a loop coupler, and then output it as an electrical signal to the modulation/demodulation circuit after detection by a detector. The structure of the digital closed-loop fiber optic gyroscope system is shown in Figure 1. The original parameter values ​​sampled from the modem circuit are processed by digital signal processing within the analog meter head to reconstruct the actual meter head signal input to the modem circuit. After obtaining the initial restored value, the corresponding performance indicators of the modem circuit are detected by modifying and loading different types of parameter values ​​in the analog meter head. The analog meter head system designed in this paper follows the basic principles of a general digital closed-loop fiber optic gyroscope system, but with changes in system structure. The modem circuit is passive in this system, while the meter head is the main body of the system. At the same time, a self-designed circuit system replaces the meter head part of the fiber optic gyroscope. The structure of the analog meter head and its test system is shown in Figure 2. In the figure, the PC host computer plays a very important role. It not only controls the coordinated work of the modem circuit and the analog meter head system, but also analyzes and organizes the collected data and completes the key software writing and installation work. [b]Hardware Design of Analog Meter Head System[/b] Based on theoretical analysis, this paper designs an FPGA-based analog meter head hardware system, as shown in Figure 3. In this closed-loop system, the main signal to be collected is the phase feedback signal in the modem circuit. Based on the characteristics of the feedback signal, an FPGA with low computational load but high processing speed was selected as the main signal processing device. In this scheme, considering cost and actual computational load, the XC3S100E FPGA chip was chosen. The system uses a ±5V regulated DC power supply. Calculations show that the system's power consumption is below 5W, therefore the DC power supply output current needs to reach 1A. According to the power supply requirements of the FPGA and its peripheral circuits, three DC/DC modules are needed: 5V to 3.3V, 5V to 2.5V, and 3.3V to 1.2V. MAX651, ADP3333, and LTC3406 were selected for voltage conversion, respectively. In addition, the 3.3V power supply is also used to drive the ADC, digital display, operational amplifier, and other devices. The XC3S100E chip offers good cost-effectiveness, with 2160 logic units, 100,000 system gate resources, and a maximum I/O port count of 108. This system fully meets the interface requirements for 16-bit input/output, digital tube indicator lights, communication with the host computer, and other control signals. An additional EPROM-XCF01S, compatible with the FPGA, is configured in the system to load the target program into the logic chip after power-on. The A/D and D/A conversions utilize the AD7671 and AD768 chips, respectively. The AD7671 features a sampling rate up to 1MSPS, is a successive approximation type high-speed, high-precision, parallel-transmission analog-to-digital converter, achieves 16-bit accuracy with no missing codes, and has a maximum integral nonlinearity error (INL) of only ±2.5LSB, perfectly meeting the requirements of this system. The AD768 is a high-speed DAC with 16-bit accuracy and a sampling rate up to 40MSPS. It has a very short response time, fast conversion speed, and strong compatibility with high-speed ADCs. When extracting initial parameters, considering the relatively weak gyroscope signal, a weak signal detection method was adopted before A/D conversion. The signal was filtered, shaped, and amplified to extract the original signal while ensuring maximum distortion-free operation, and then converted it into a signal output that the ADC could distinguish. [b]Software Design of the Analog Meter System[/b] Based on the basic principle of the closed-loop fiber optic gyroscope meter head, the actual meter head output signal is a comb wave with a constant period. The voltage difference between the odd and even periods in the waveform represents the electrical signal quantity corresponding to the optical path difference between the two beams in the meter head's fiber optic loop. The stepped wave generated by the modulation and demodulation circuit is used as the input of the actual meter head. Therefore, the analog meter head software needs to solve two problems: one is to generate a random number X symbolizing the optical path difference (the angular velocity ω can be calculated from the optical path difference), and the other is to use the stepped wave sent by the modulation and demodulation circuit to calculate and extract the stepped value S and its period. The software design flow of the core algorithm is shown in Figure 4. In the flowchart, module A is used to determine the sign of the stepped value. Based on the characteristics of the actual demodulation circuit, the feedback signal is obtained by accumulating the step values ​​generated by the demodulation circuit and then modulating them with a square wave. High-low reset operations are used during the accumulation process. Therefore, it is necessary to determine the sign of the step value before further processing the sampled values. Here, a counter is set up to perform multiple difference comparisons on adjacent sampled values ​​within the same period to determine the sign, avoiding the influence of sudden changes in sampled values ​​caused by high-low reset operations on the judgment result. Module B is the high-low reset judgment and compensation module. This module determines the reset point by comparing the magnitudes of sampled values ​​before and after the same period, and then performs corresponding compensation operations on the reset sampled values. Functional simulation of the analog meter header written in Verilog HDL was performed on the Xilinx ISE8.2 platform. The commonly used ModelSimSE 6.2 was used to simulate the Testbench module to check the correctness of the calculations and logic in the program design. The simulation module sets the master clock MCLK period to 10ns, with the high and low levels having the same duration. Sampling is performed every 50 clock cycles, and 16 sampled values ​​are accumulated to calculate the step value. The simulation time was set to 35000ns, RSTB was the main reset signal, ADBUSY and ADCNVST were the ADC control signals, and CLOCK was the DAC control signal. This scheme verified the simulation results of random number X and input INDATA under several extreme conditions to check the correctness of the meter head program design. [b]Conclusion[/b] Based on the above hardware and software design, a simulated meter head system capable of simulating the behavior of a fiber optic gyroscope meter head can be designed. During testing, by connecting the actual fiber optic gyroscope meter head and modulation/demodulation circuit with the designed circuit system, the desired waveform and data can be obtained. Comparing the random input number (representing angular velocity ω) of the simulated meter head with the output of the modulation/demodulation circuit under test can effectively verify the performance of the tested modulation/demodulation circuit. Editor: He Shiping