This article discusses the fundamental physical relationships that determine the inherent noise of an operational amplifier (op amp). Integrated circuit designers make performance trade-offs between noise and other op amp parameters, and board and system-level designers can draw inspiration from this. Additionally, engineers can learn how to estimate worst-case noise at room temperature and above, based on typical specifications in the datasheet. Five Rules of Thumb for Worst-Case Noise Analysis and Design Most op amp datasheets only list typical values ​​for op amp noise, without any information on noise temperature drift. Board and system-level designers want to find a way to estimate maximum noise based on typical values, and this method should also be able to effectively estimate noise drift with temperature. Some basic transistor noise relationships are given here to help with these estimations. However, to accurately utilize these relationships, some understanding of the internal topology (such as bias structure and transistor type, etc.) is necessary. However, some general descriptions covering most structure types can be made if we consider the worst-case structure. This section summarizes five rules of thumb for worst-case noise analysis and design. The next section provides detailed mathematical calculations related to these rules of thumb. Rule of thumb 1: Modifying the semiconductor process will not affect broadband voltage noise. This is because operational amplifier noise is typically caused by the operational amplifier bias current. Generally, the bias current from one device to another is relatively constant. In some designs, noise primarily comes from the thermal noise of the input ESD protection resistor. Therefore, it is highly unlikely that broadband noise will vary by more than 10% of the typical value. In fact, this variation is generally less than 10% for many low-noise devices. See Figure 7.1 for an example. Broadband current noise is more susceptible to changes than voltage noise (primarily for bipolar processes). This is because current noise is closely related to the base current, which in turn depends on the transistor current gain (beta). Typically, the broadband current noise spectral density varies by less than 30%. Figure 7.1 Broadband noise at room temperature based on typical values. Rule of thumb 2: Amplifier noise varies with temperature. For many bias schemes (e.g., the temperature-proportional scheme, PTAT), noise increases proportionally to the square root of the absolute temperature, resulting in relatively small noise variations over a wide range of industrial temperatures (e.g., only a 15% change between 25°C and 125°C). However, some bias schemes (e.g., Zero-TC) can produce noise that is directly proportional to the absolute temperature. For this worst-case scenario, the noise variation over the same temperature range is 33%, as illustrated in Figure 7.2. Figure 7.2 Noise variation with temperature in worst-case and typical cases. Rule of thumb 3: 1/f noise (e.g., flicker noise) is highly susceptible to process variations. This is because defects are introduced during crystal structure manufacturing processes, and the generation of 1/f noise is related to these defects. Therefore, as long as the semiconductor process is well controlled, 1/f noise will not exhibit significant drift. Manufacturing or process variations can cause substantial changes in 1/f noise. In most cases, device datasheets provide the maximum 1/f noise value but do not mention measurements taken during manufacturing or final testing. If the datasheet does not provide the maximum 1/f noise value, then, assuming no optimization of process controls to reduce 1/f noise, three variation factors can be used to estimate the worst-case noise, as shown in Figure 7.3. Figure 7.3: Worst-case 1/f noise estimation. Rule of thumb 4: One point that PCB and system-level designers need to know is that Iq and broadband noise are negatively correlated. Strictly speaking, noise is related to the bias of the operational amplifier input differential stage. However, since this information has not been officially published, we can assume that Iq is proportional to the differential stage bias. This assumption holds true for low-noise amplifiers. Generally speaking, broadband noise is inversely proportional to the square root of Iq. However, this inverse relationship will change for different bias schemes. This rule of thumb helps PCB and system-level designers better understand the trade-offs between Iq and noise. For example, designers should not expect amplifiers to have extremely low quiescent current, and consequently, low noise. Figure 7.4 illustrates this relationship. Rule of thumb 5: FET operational amplifiers have very low inherent current noise. This also explains the difference between bipolar and FET transistors and their noise levels. This is because the input gate current of a FET amplifier is much smaller than the input base current of a bipolar amplifier. Conversely, given a bias current value (e.g., the collector or drain current of the input stage), bipolar amplifiers have lower voltage noise; see several examples in Figure 7.5. Operational Amplifier Type Iq (mA) in (fA/rt-Hz) en (nV/rt-Hz) OPA277 Bipolar 0.79 200 8 OPA211 Bipolar 3.6 1500 1.1 OPA227 Bipolar 3.7 400 3 OPA348 CMOS 0.045 4 35 OPA364 CMOS 1.1 0.6 17 OPA338 CMOS 0.53 0.6 26 Figure 7.5 Comparison of voltage and current noise between MOS amplifiers and bipolar amplifiers Detailed Mathematical Calculation Method for Bipolar Noise Figure 7.6 illustrates the principle of the bipolar transistor noise model. Figure 7.7 (Equations 1, 2, and 3) gives the basic noise relationships of bipolar transistors. In this section, we will use these equations to derive some basic relationships, and the rules of thumb are based on these basic relationships. Figure 7.6 Bipolar Transistor Noise Model Figure 7.7 Basic Bipolar Noise Relationship Analysis using Equation 1: Bipolar Thermal Noise Equation 1 illustrates the thermal noise of the physical resistor in the base of a bipolar transistor. In an integrated circuit operational amplifier, the resistor is typically provided by an ESD protection circuit connected in series with the base of the differential input stage, as shown in Figure 7.8. In some cases, this noise is the primary noise source. For most integrated circuit processes, a ±20% tolerance for this resistor is reasonable. Figure 7.9 shows that a 20% change in input resistance results in a corresponding 10% change in noise. Figure 7.8 Operational Amplifier Noise Thermal Noise Components Figure 7.9 Thermal Noise Tolerance Analysis using Equation 2: Bipolar Collector Shot Noise Equation 2 gives the relationship of a bipolar transistor collector shot noise. To better understand this relationship, converting it to a voltage noise Vcn (see Figure 7.10) is highly beneficial. If the input stage bias scheme is known, the formula can be further simplified. There are two types of operational amplifier input stage biasing schemes. One type forces the collector current to be proportional to the absolute temperature (PTAT). For a biasing scheme proportional to absolute temperature, the collector current can be considered as a constant product of the absolute temperature. Figure 7.11 shows a simplified Vcn equation based on a PTAT biasing scheme. The main calculation result is that noise is proportional to the square root of the temperature and inversely proportional to the square root of Ic. This calculation explains why low-noise amplifiers always have a strong quiescent current. The fourth rule of thumb is derived from this. The calculation also shows that operational amplifier noise increases with increasing temperature. This is the theoretical basis for the second rule of thumb. Figure 7.10 Converting current noise to voltage noise Figure 7.11 Collector noise voltage under PTAT bias In a "Zero-TC" configuration where the collector current bias does not drift with temperature, the operational amplifier input stage is also biased. Figure 7.12 shows a simplified Vcn equation based on the Zero-TC bias structure. The main calculation result is that the noise is proportional to the square root of the temperature and inversely proportional to the square root of Ic. Due to its significant susceptibility to temperature variations, the Zero-TC configuration has shortcomings compared to the PTAT method. It should be noted that this is the worst-case performance according to the second rule of thumb. Figure 7.12 Zero-TC bias collector noise voltage. When Ic varies, the change in noise can be determined using the calculation results in Figures 7.11 and 7.12. In both cases, the noise is inversely proportional to the square root of Ic. In an integrated circuit operational amplifier design, noise typically originates primarily from the differential input stage. Unfortunately, the datasheet does not provide information about the amplifier bias. To obtain a rough estimate, you can assume that the change in Ic is proportional to the change in quiescent current (Iq). In summary, the input stage bias is better controlled than Iq, therefore this is a conservative estimate. Figure 7.13 shows the worst-case noise estimate for an OPA227. It's important to note that in this case, variations in Iq have almost no effect on the noise. For most practical designs, this variation will not exceed 10%. Note that the first rule of thumb is that both thermal noise and shot noise variables (Ic variables) should not exceed 10%. Figure 7.13 shows the worst-case noise based on the Iq variable, analyzed using Equation 3: Bipolar Base Shot Noise and Flicker Noise. Equation 3 describes the bipolar transistor base shot noise and flicker noise, a noise source similar to the current noise in an operational amplifier. This current noise can also be converted to voltage noise (see Figure 7.14). Analyzing PTAT and Zero-TC bias structures is not as straightforward as analyzing collector current shot noise. This is because the biasing method is designed to control the collector current, and this correlation does not follow the base current. For example, a device with a Zero-TC collector current will not have a Zero-TC base current because the bipolar current gain varies with temperature. The shot noise component in Equation 3 is the main cause of broadband current noise. Note that the current noise is proportional to the square root of Ib, which is why broadband current noise is more susceptible to changes than broadband voltage noise. The variation in Ib is caused by the transistor's current gain (beta). Note that the shot noise component has the same form as the noise component in Equation 2. Therefore, the analysis is the same except that it is difficult to predict the temperature coefficient of the base current. So for simplicity, we will not include the temperature information of the Ib shot noise. As shown in Figure 7.14, we can convert the flicker noise component into a voltage noise. Note that flicker noise increases with increasing temperature and decreases with changes in Ic. However, flicker noise is highly susceptible to process variations, to the point that variations in the flicker noise constant can become a major source of noise. This is different from the broadband case where the constant is unaffected by process variations. The second rule of thumb is derived from this fundamental relationship. Figure 7.14 Flicker Noise Voltage Relationship [b]Detailed Mathematical Calculation of FET Noise[/b] Figure 7.15 shows a schematic diagram of the noise model for MOSFET and JFET transistors. Figure 7.16 (Equations 4 and 5) gives the basic noise relationship for FET transistors. In this section, we will use these equations to illustrate that this rule of thumb also applies to FET transistors. Figure 7.17 shows the processed thermal noise equation for strong inversion FETs with PTAT and Zero-TC biases. Strong inversion refers to the FET bias region. The calculation result for strong inversion is that the thermal noise is inversely proportional to the fourth root of Id. Whether the thermal noise is proportional to the square root of the absolute temperature or the fourth root of the absolute temperature depends on the bias type. Therefore, changes in Iq or temperature have a much smaller effect on strong inversion FET amplifiers compared to bipolar amplifiers. Figure 7.15 Bipolar Transistor Noise Model; Figure 7.16 Basic FET Noise Relationship; Figure 7.17 Strong Inverting FET; Figure 7.18 shows the operation of applying a thermal noise equation to the PTAT and Zero-TC bias of a weakly inverting FET. Weak inversion refers to the FET bias region. The calculation result for weak inversion is that the thermal noise is inversely proportional to the square root of Id. Whether the thermal noise is directly proportional to temperature or to the square root of temperature depends on the bias type. Therefore, the relationship between the weakly inverting FET amplifier and current and temperature is similar to that of a bipolar biased amplifier. Figure 7.18 Weakly Inverting FET; Figure 7.19 shows the processed flicker noise equation applied to the PTAT and Zero-TC bias of a strongly inverting FET. Note that "a" in the equation is a constant between 0.5 and 2. Therefore, the flicker noise may be directly proportional to Id or inversely proportional to a power of Id, depending on the value of "a". For a Zero-TC bias scheme, the flicker noise value is not temperature-dependent. For a PTAT bias scheme, flicker noise is proportional to the square root of the temperature. Figure 7.19 Flicker Noise of a Strong Inverting FET Figure 7.20 shows the equations for calculating flicker noise for a weak inverting FET with PTAT and Zero-TC bias. Note that “a” is a constant between 0.5 and 2. Therefore, in all cases, flicker noise is inversely proportional to the power of Id. For a Zero-TC bias, flicker noise will be proportional to the absolute temperature; for a PTAT bias, the temperature relationship depends on the value of a. Figure 7.20 Flicker Noise of a Weak Inverting FET [b]Summary and Overview[/b] In this article, we discussed some rules of thumb that help us estimate noise in the worst case and temperature-dependent noise. These rules of thumb can also help board and system-level designers obtain trade-off design methods that are used by integrated circuit designers in low-noise designs. Furthermore, the detailed mathematical calculations behind these rules of thumb are provided. Part 8 will delve deeper into 1/f noise and "popcorn" noise. Editor: He Shiping