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Design of an FPGA-based phase detection broadband frequency measurement system

2026-04-06 04:31:11 · · #1
In electronic measurement technology, frequency measurement is one of the most fundamental measurements. Commonly used frequency measurement methods and period measurement methods have significant limitations in practical applications and suffer from an error of ±1 digit in counting the measured signal. While equal-precision frequency measurement methods, developed based on direct frequency measurement, eliminate the error introduced by counting and achieve high-precision measurement over a wide frequency range, they cannot eliminate or reduce the error introduced by the standard frequency. This paper introduces a system that employs phase-detection broadband frequency measurement technology, achieving synchronization not only with the measured signal but also with the standard frequency signal. This significantly eliminates the ±1 digit counting error found in general frequency measurement systems. Furthermore, by incorporating a Field-Programmable Gate Array (FPGA), it features high integration, high speed, and high reliability, enabling a frequency measurement range of 1Hz to 2.4GHz with a frequency measurement accuracy on the order of 10⁻¹¹ under a 1s gate. Frequency Measurement Principle The frequency measurement principle used in this system is phase-detection broadband frequency measurement technology. In frequency measurement, let the standard frequency signal be f0 and the measured signal be fX. Then f0 = A·fC, fX = B·fC, where A and B are two coprime positive integers. fC is called the greatest common factor frequency fmax c of f0 and fX, and its reciprocal is the least common multiple period Tmin c of the two frequencies. If the periods of these two signals are stable, the phase difference between them also has a periodicity, which is Tmin c. If the initial phase difference between the two signals is 0 (i.e., the initial phases coincide), then after N·Tmin c (N is a positive integer), their phases will coincide again. Therefore, by counting Nx and N0 of the measured signal fX and the standard frequency signal f0 within one or more Tmin c intervals, the frequency of the measured signal can be obtained by the formula fX = f0·NX/N0. In the frequency measurement circuit for phase coincidence detection, the measured gate timing signal is jointly controlled by the reference gate timing set by the microcontroller and the phase coincidence point of the measured signal and the standard frequency signal. However, the opening and closing of the actual measurement gate are synchronized with the phase coincidence point of the measured signal and the standard frequency signal, which can effectively eliminate the ±1 word error in the traditional frequency measurement method. Hardware Composition and Functional Block Diagram The entire frequency measurement system consists of multiple functional modules, including MCU data processing, FPGA and its configuration, high-frequency division, signal shaping, and LCD display. The FPGA integrates functions such as phase coincidence point detection, synchronous gate generation, and timing counting. The main hardware functional block diagram is shown in Figure 1. Figure 1 Main Hardware Functional Block Diagram of the System The FPGA chip in this frequency measurement system is the ALTERA Cyclone series EP1C3T144. This device uses a TPFQ package and has 100 I/O ports and 2910 logic units. This system employs a combination of Verilog HDL and BlockDiagram/Schematic to logically describe each functional module. Then, using an EDA development platform, the design files are automatically compiled, simplified, synthesized, optimized, placed and routed, and simulated. Finally, the FPGA chip is programmed to meet the system's design requirements. The FPGA configuration utilizes a dedicated configuration chip, EPCS1, programmed using ByteBlaster II. The MCU primarily performs 32-bit floating-point conversion and arithmetic, preset gates, and displays measurement results on an LCD. High-frequency division is mainly for measurements above 50MHz. The circuit uses the MB510 microwave frequency divider chip with a programmable division ratio, operating at a maximum frequency of 2.4GHz. It has built-in amplification and shaping circuitry, outputting ECL level signals, making it very easy to use. The shaping circuit uses high-speed MOSFET amplification, resulting in high sensitivity to the measured signal, reaching approximately 20mV. Therefore, the system places very strict requirements on the circuit board design. FPGA Simulation The FPGA development software used in this system is Quartus II software developed by Altera. Figure 2 shows the overall FPGA schematic design. The standard frequency f0 and the measured frequency fX pass through the in-phase detection module qwen, and the resulting phase coincidence information is shown as output out11 in Figure 3. The sgate signal is a preset gate signal issued by the MCU, which, together with the generated in-phase signal, forms a synchronization gate tgate via a D flip-flop module to control the counting of f0 and fX. The count value is then transmitted to the MCU after bus control conversion. In Figure 3, the simulated standard frequency f0 is 10MHz, fX is 9.0001MHz, out11 is the output of the phase coincidence information, sgate is the preset gate, and out111 is the synchronization gate output, also known as a hard gate. Figure 4 shows the timing analysis. Through the simulated timing analysis shown in Figure 4, we can see that such superior delay characteristics cannot be obtained using discrete components. PCB Design Considerations During the design of the printed circuit board, a detailed study of the circuit's anti-interference issues is necessary. For detection circuits, especially high-precision frequency measurement systems, the performance of the power supply plays a crucial role. Power is typically obtained from 220V AC after transformation and rectification. To prevent the introduction of alternating interference, we shield it and add decoupling capacitors. Even if the routing throughout the printed circuit board is well done, interference caused by inadequate consideration of power and ground lines can degrade product performance and sometimes even affect the success rate. Therefore, the routing of power and ground lines must be carefully considered to ensure product quality. Maximize the width of power and ground lines, ideally with ground lines wider than power lines. Their width relationship is: ground line > power line > signal line. Add a decoupling capacitor at the power supply of each integrated circuit, and add a small high-frequency bypass capacitor next to each electrolytic capacitor. This system is composed of a mixture of digital and analog circuits. Therefore, the issue of mutual interference between them needs to be considered during routing, especially noise interference on the ground line. Digital circuits operate at high frequencies, while analog circuits are highly sensitive. For signal lines, high-frequency signal lines should be kept as far away as possible from sensitive analog circuit devices. For ground lines, the entire PCB has only one connection point to the outside world, so the issue of shared digital and analog grounds must be addressed internally. Internally, digital and analog grounds are actually separate, only shorted at the interface between the PCB and the outside world (such as connectors). MCU Software Flow The overall functionality of this system is largely implemented by the MCU. The main functions of the software are: after initialization, the program determines the preset gate time of the hardware and selects the frequency channel to be measured (high/low frequency); the FPGA generates a synchronous gate opening counter based on the preset gate, and after counting, sends a completion signal to the MCU. The MCU then reads the FPGA count value in several increments and stores it in memory. After reading, it calculates the frequency value through floating-point operations and sends it to the LCD display. The software flowchart is shown in Figure 5. Figure 5 Software Flowchart Summary Extensive statistical experiments were conducted on this frequency measurement system. A high-stability rubidium atomic clock provided by the Information Processing Research Institute of Xi'an University of Electronic Science and Technology was selected as the standard frequency for this system to measure the synthesized frequency of the Agilent 8662 frequency synthesizer. The measurement results are shown in Table 1. Because this system employs phase-detection broadband frequency measurement technology, its measurement accuracy reaches a relatively high level in the field. However, if atomic frequency standards were placed in each frequency meter, the product price would increase significantly. Therefore, to reduce costs and make the product more widely available, a high-stability SC-cut crystal oscillator was used instead of the atomic frequency standards. Although the measurement accuracy decreased slightly, it still has a significant advantage compared to similar products, and the price is also more reasonable, giving it a strong market competitiveness. Since frequency measurement instruments generally have many functions, it is essential to improve the functionality of this product. Functions such as period measurement, phase difference measurement, and communication with a PC can be added to make it more multifunctional. Editor: He Shiping
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