[b]1 Introduction[/b] BX-type signal transformers, BG-type track transformers, and ZG-type silicon rectifiers, as the front-end of railway signal electrical equipment, directly affect train operation safety in terms of stability and accuracy. Reliable transformer testing is the first step in ensuring quality. For manufacturers, sampling is not permitted in the testing process, and test results must be archived. This testing system is used to test various required parameters of railway transformers, including primary side no-load current, secondary side no-load voltage, secondary side load voltage and current, transformer insulation resistance, and primary side voltage frequency. The measurement accuracy requirement is 3%. The testing system consists of two main parts: a lower-level computer and a higher-level computer. The lower-level computer utilizes the design concept of intelligent instruments, automatically testing various required parameters based on MCU and CPLD control. The upper-level computer uses VC++ 6.0 software to implement serial communication, classify and statistically analyze results, determine whether they are qualified, and store and print the results. The system is designed to be simple and reliable to operate, improve efficiency, and reduce errors.　　[b]2. Function Introduction[/b] The lower-level machine uses the 80C196KC as the control center. Its main program flowchart is shown in Figure 1. After the transformer is connected to the test terminal of the tester, the power is turned on and the tester is turned on. The tester first performs initialization, including the initialization of PSD, global variables, serial port, interrupt 8253 counter, LCD, etc. Then it performs self-test, including checking whether the internal circuit of the tester is normal and whether it rings (an alarm caused by reverse voltage connection at the transformer input terminal). It continuously detects the input terminal voltage for 8 cycles and judges whether the input power supply is connected properly, whether the voltage is normal, and whether the communication is normal. The self-test process is a cascade test (if any self-test fails, the light flashes and an alarm sounds). The MCU displays the working status according to the input value and calls the subroutine for processing. When the transformer model is manually input, the monitor enters the setting state, controls the corresponding relay to act, connects all secondary windings of the transformer to the test terminal, selects the appropriate range, and enters the test state. After the parameters are measured, the MCU processes and displays the corresponding transformer test results, enters the judgment state, judges whether the transformer is qualified, and triggers the buzzer alarm if it is not qualified. According to the requirements, it enters the communication state to send and receive data to the host computer. This design uses two EPM7128 chips from the MAX7000 series. The main functions of the first CPLD (1) are as follows: (1) Connect to the corresponding pin of the A/D chip (MAX125), control the analog-to-digital conversion and read its result. MAX125 is a parallel output chip, which operates in words, so it needs to read 14 bits at a time and latch it with two bytes. (2) Transmit the A/D conversion result to the 80C196 for processing through the system bus. (3) Buffer the data to be displayed processed by the 80C196 and generate the LCD data (8-bit) bus driver. (4) Keyboard response. (5) JTAG function. The second CPLD (CPLD (2)) drives the relay corresponding to the secondary winding of the model to engage and disengage after decoding the instruction issued by the MCU or the input model, and selects the range. Since the relay has no address, all data for operating it must be sent at the same time. Even if only the state of one relay is changed, the data of the unchanged relay must be sent to the CPLD for latching at the same time, so decoding is necessary. Figure 2 shows the functional structure diagram of the CPLD. It can be considered that the CPLD plays a crucial role in the lower-level machine. On one hand, it communicates with and is controlled by the MCU; on the other hand, the CPLD performs operations on the front-end circuits, keyboard, LCD, and relay board. Therefore, from the overall system perspective, the CPLD completes some interface functions. [b]3 Frequency Tracking Measurement Technology[/b] This system requires AC sampling of the transformer's voltage, current, and frequency. Accurate frequency measurement is crucial for the success of AC sampling applications, as we take the average voltage and current values ​​over eight normal sampling cycles. Furthermore, since different transformer models have different output frequencies, frequency measurement is also necessary. Response time, measurement accuracy, and hardware requirements are the main indicators of the frequency measurement method. We can quantitatively analyze the magnitude of the effective value error of the voltage signal caused by voltage signal frequency fluctuations. Generally, the fluctuation of the power frequency often exceeds 0.1Hz, i.e., δf>0.1/50=0.5%, which affects the effective value of the voltage signal by 0.25%. Therefore, online automatic tracking of the sampling frequency to the power frequency should be achieved to ensure measurement accuracy. Considering that the system frequency does not change rapidly, in order to achieve real-time adjustment of the sampling frequency with the change of the system power frequency, the count value Tc corresponding to the previous cycle of the system frequency can be measured first (in units of the timer clock cycle of the microcontroller system). Then, according to the number of sampling points (N) per cycle, the count value Tsj of each sampling interval can be calculated in time. Interval count value: Tsj=Tc/N (2) Sampling with Tsj as the cycle can achieve real-time tracking of the sampling frequency and ensure AC equal interval sampling. To achieve this process, the circuit structure usually adopted is as follows: the voltage (current) from the voltage (current) transformer passes through a low-pass filter and a follower, and is shaped into a square wave by a zero comparator (LM339 can be used). It is then sent to the high-speed input interface HS1.0 of the 80C196KC through an optocoupler (such as 4N35). The rising edge of the square wave triggers the high-speed input interrupt, and the count value Tc of each power frequency cycle is obtained. The microcontroller calculates the sampling interval time Tsj by formula (2). Using Tsj as the time interval, a software timer interrupt is set. The sampling interval is set in the software timer interrupt, and the main program determines the time interval for starting the A/D converter based on it, thus greatly reducing the periodic error and real-time tracking of the sampling frequency. [b]4 CPLD Module Design[/b] After clarifying the main function of the CPLD, we implemented the functions of these modules in Max+Plus II software using VHDL. The design includes four stages: design input, design processing, design verification, and device programming. VHDL is mainly used to describe the structure, behavior, function, and interface of digital systems. It is very suitable for the application design of programmable logic chips. 4.1 Main Module Process When the system detects the transformer, after normal initialization, the MCU will request the CPLD to run the key response process when there is keyboard input. The CPLD runs the relay control process according to the entered model, operates the relay board, and uploads the operation results. Only after the MCU considers the above operations to be normal will it request the CPLD to start the A/D control process, and the analog-to-digital conversion result will be sent to the MCU. After the MCU processes the conversion result, it will request the CPLD to run the display process and display the result on the LCD. 4.2 Simulation is performed using the ReadOperation process as an example. — Process Name: ReadOperation — Sensitive Variable: RD — Output Variable: DataBusIn (sent to the data bus) — Purpose: Read operation ReadOperation: process(RD, Enlcd, En125Low, En125High, CSIF, CSIM) It should be noted that the signal variables need to be declared with initial values ​​during simulation. The signal variables in this read operation process will be assigned values ​​by other processes (such as the chip select process). "&" is used as a concatenation operator to connect multiple objects or vectors into a larger vector. The waveform diagram of the ReadOperation process during compilation and simulation is shown in Figure 3. [b]5 Conclusion[/b] Experimental test data was obtained through on-site trials. Table 1 lists the test results of some parameters of three BX1-34 transformers. In this table, the primary unloaded current (I_{no-load current}) represents the primary unloaded current, and the unloaded voltage (II₁₂) refers to the unloaded voltage at terminals 1 and 2 of the secondary winding. The secondary unloaded voltage (II_{no-load voltage}) is the total unloaded voltage of the secondary winding, and the full-load voltage refers to the voltage value when an 8Ω resistor is connected in series with the secondary winding. The results meet the requirements of the "Signal Maintenance Rules" for transformers: "When the input rated voltage is applied, the error of the secondary terminal voltage under no-load conditions should not exceed 10% of the rated terminal voltage; when the capacity of a transformer with a capacity of 30-60VA is fully loaded, its secondary terminal voltage should not be less than 85% of the rated terminal voltage." This development comprehensively considered the interaction between the MCU and CPLD, adopted AC sampling technology, carefully considered the parallel processing of VHDL processes and the structural characteristics of the CPLD, and applied several circuit simplification techniques and methods. It fully utilized the hardware resources of the CPLD to optimize the circuit and achieve the system's requirements for stability and accuracy. Editor: He Shiping