Design of a Novel Intelligent Low-Voltage Circuit Breaker Controller
2026-04-06 06:47:10··#1
Abstract: This paper introduces the design of a novel intelligent low-voltage circuit breaker controller based on the DS80C390 microprocessor. In addition to the basic three-stage protection function, the circuit breaker also has the functions of detecting, displaying, and providing pre-alarms for parameters such as voltage, current, power factor, and circuit breaker opening/closing status. It utilizes CAN fieldbus technology to achieve remote transmission of data and control information. This design employs numerous integrated chips, which can reduce product size, improve reliability, shorten product development cycle, and reduce costs. Keywords: Microprocessor, Intelligent controller, Low-voltage circuit breaker 1. Introduction Low-voltage circuit breakers are important components in low-voltage power distribution systems, playing roles in stage control and protection. Currently, foreign low-voltage circuit breakers are developing towards high performance, miniaturization, intelligence, and modularity, and are connected to fieldbus systems to achieve networking. Some domestic manufacturers have also developed similar intelligent circuit breaker controllers, but their main drawback is the limited use of large-scale integrated devices, resulting in a larger size and susceptibility to interference. This paper introduces the design of a novel intelligent low-voltage circuit breaker controller. Its main features include: a) Emphasis on modular design and the use of large-scale integrated devices. This not only shortened the product development cycle and improved product performance, but also reduced product size and lowered costs; b. While achieving basic protection functions, it added early warning functions; c. In terms of parameter measurement, in addition to conventional parameters such as current and voltage, it added power factor and power measurement, and displayed the parameters; d. It emphasized the reliability design of the product; e. The circuit breaker has a communication interface and introduces CAN fieldbus technology. 2. Design of the Intelligent Low-Voltage Circuit Breaker Controller 2.1 Overview of the Overall Scheme The main components of this circuit breaker controller include a microprocessor, signal acquisition circuit, keyboard and display circuit, external memory, temperature detection circuit, output execution circuit, and power supply. 2.2 Selection of Microprocessor The intelligent circuit breaker controller needs to achieve various functions and also have good real-time performance and electromagnetic compatibility. This design uses the Dallas DS80C390 microprocessor. Its main features include: backward compatibility with 80C52, using the 80C51 instruction set; high-speed architecture, with only 4 clock cycles per machine cycle and a maximum system clock frequency of 40MHz; compatibility with 80C52 memory mode, containing 4KB of SRAM, and external expansion of 4MB of program memory and 4MB of user data memory. It includes two CAN2.0B control ports, offering high integration. The DS80C390 has 2 serial ports, 3 timers/counters, 7 additional interrupts, 1 programmable dog timer, 6 8-bit /O ports (two of which interface with memory), and a data pointer OPRT1. The DS80C390 is available in two package types: a 68-pin PLCC and a 64-pin LQFP; this design uses the former. 2.3 Signal Acquisition Circuit Conventional signal input channel designs typically involve filtering, isolation amplification, and then A/D conversion, but this method is difficult to meet real-time requirements. This design requires the acquisition of three line voltage signals and four phase current signals, and the signal range to be acquired is very wide. If a conventional design is used, many A/D conversion channels are required. Therefore, the Cirrus Logic electronic energy meter chip CS5460 is used to design the signal input channels. (1) Features of CS5460. a. High integration. It has a programmable gain amplifier, a voltage channel with a fixed gain amplifier, and two selectable high-pass filters. b. High precision. The conversion accuracy can reach 0.1%. c. Easy interface. CS5460 is a high-speed A/D device. In the default state, the instantaneous A/D conversion frequency can reach 4kHz. Its built-in programmable gain amplifier can measure signals in the range of 150mV to 30mV, thus solving the problems of real-time performance, wide measurement range and low measurement accuracy. (2) Hardware design of CS5460. The voltage values induced on the secondary side of the voltage and current transformers are divided and sent to the UIN+, UIN- and IIN+, IIN- pins of CS5460 respectively. The CS5460 has four serial ports: SDI is the serial data input port, SDO is the serial data output port, SCLK is the serial clock, and CS is the chip select control line. Because four current and three voltage values need to be acquired, four CS5460 chips were selected. Each CS5460 chip was selected in turn by pins p4.0, p4.1, p4.2, and p4.3. When CS=1, SOD is in a high-impedance state, so the pins of the four CS5460 chips can be directly connected together. Since the I/O port of the DS80C390 can drive four gate circuits, the SDI and SCLK pins of the four CS5460 chips are directly connected in wired-AND form. (3) Software design of CS5460. The basic program of the software design in this design is written in C51. The initialization and startup conversion of CS5460 are completed by the main program. The design requires that one point be acquired on the three voltage and four current channels every 1.25ms, using a software timer interrupt method. The system starts an interrupt service routine every 1.25ms to complete the acquisition of the instantaneous values of each signal, and completes the acquisition of the effective values of each signal every 2s. The DS80C390 interfaces with the CS5460 through the SDI, SDO, SCLK and CS signal lines. Write operations are used to set the internal registers of the CS5460; read operations are used to read the values of the internal status registers and output result registers of the CS5460. 2.4 External memory circuit Traditional microcontroller application systems are generally composed of a microprocessor as the core and necessary external chips. However, when many external chips are required, the resulting system structure will be very complex and difficult to update or modify. Therefore, this design uses the PSD934F2 chip. (1) Main features of PSD934F2. The PSD934F2 chip launched by WSI in the United States is designed specifically for 8-bit microprocessors and realizes the integration of multiple peripheral chips into one chip. Its main features include: convenient use of multiplexed and non-multiplexed 8-bit microprocessor interfaces; built-in 2MB main FLASH memory and 256KB secondary FLASH memory; 64KB SRAM; 19-output general-purpose PLD (GPLD); decoder PLD (DPLD); 27 individually configurable I/O pins; standby current can be reduced to 50μA; JTAG-compliant serial port allows in-system programming of the entire chip; FLASH memory erase/write cycles can reach at least 100,000 times, and PLD erase/write cycles can reach at least 1,000 times. (2) Hardware circuit of PSD934F2 and DS80C390. The system requires 256KB FLASH, 125±8KB SRAM and 16KB auxiliary FLASH, as well as 31 I/O outputs and some peripheral chip select outputs, so the system also expands with a 128KB SRAM. In this design, the DS80C390 operates in 22-bit continuous leaf addressing mode and is configured with 8-bit data/address multiplexing. The program enable signal PSEN is used to access the program memory of the PSD934F2, and WR and RD are used to access the data memory. The 27 I/O pins of the PSD934F2 are divided into 4 ports (PA, PB, PC and PD), and each pin can be configured to different functions. (3) Software development of PSD934F2. PSD934F2 is supported by PSDsoft software. During system design, it is not necessary to use hardware description language (HDL) to define the pin functions of PSD934F2 and allocate memory addresses. PSD934F2 supports FlashLINK device programmer to program PSD934F2. First, the pin functions of PSD934F2 and the memory addresses are defined by PSDsoft software, and then PSDsoft merges the PSD934F2 configuration with the user HEX file to generate the target file. HEX files are generated by compiling and linking applications written in high-level languages and embedding PSDs. The target is then written to PSD934F2 via FLASHLINK. 2.5 Temperature Detection Circuit Traditional temperature detection circuits use temperature-sensitive elements such as thermistors. Although thermistors are low in cost, they require subsequent signal processing circuits, and the calibration of the measurement channel is troublesome. The accuracy of temperature measurement is also relatively low. Therefore, this design uses the DS1620 digital temperature sensor produced by Dallas. (1) Features of DS1620. The DS1620 digital temperature sensor is a new type of temperature-sensitive device launched by Dallas. It outputs temperature measurement values in digital form and has the characteristics of wide measurement range, long transmission distance, reliability, and stability. The measurement range of DS1620 is -55 to 125℃, and the resolution is 0.5℃. The temperature is output in 9-bit digital form and can complete the numerical conversion of the measured temperature within 1 second. It can work independently or be easily connected to a PC or microcontroller in serial mode. (2) Hardware and software design of DS1620. The DS1620 uses a high-temperature coefficient oscillator to control the number of pulses of a low-temperature coefficient oscillator, thus achieving a digital output of the measured temperature. The temperature counter and register are preset to a reference value of -55℃. If the temperature register and register are both 0 before the end of the pulse cycle, the temperature register increments to the measured temperature value. The DS1620's DQ pin is a data input/output pin (3-wire communication). CLK/CONV are clock outputs during 3-wire communication and start-up pins when the CPU is not used. RST is a reset input pin. The DS1620 connects to the microprocessor via a three-wire serial interface to write relevant data and read temperature data. 2.6 During system operation, the entire system needs to undergo a periodic calibration. Therefore, this design selects the PCF8563 real-time clock/calendar chip. The PCF8563 and DS80C390 use an I2C communication interface for data transmission. Since the DS80C390 itself does not have an I2C communication interface, a software simulation method is used to interface with the PCF8563, which has an I2C interface. When the microprocessor sends the ninth pulse, it reads the status on the SDA line. If the read status is 0, it means the data has been successfully written to the PCF8563; if the read status is 1, it means the write operation failed, and the program proceeds to the next write operation. Each time an operation is performed, the embedded word address register automatically increments. Based on this, it can be determined whether the program's read/write operation on the PCF8563 is complete. Every so often, the host sends a standard time, which is transmitted to each functional node via the CAN bus. Each node then synchronizes its own clock. When a node experiences a fault or alarm, it reads its own PCF8563 to obtain the time value at the time of the fault or alarm. 2.7 CAN Bus Interface Circuit The CAN bus is a widely used communication technology in the field of fieldbuses. Replacing the previous RS-485 with CAN will fundamentally improve the performance of the monitoring system. The DS80C390 integrates two full-function CAN2.0 controllers, easily interfaced with external CAN buses. 2.8 Keyboard and Display Circuit When designing the keyboard, one end of the key is directly connected to the microprocessor's I/O line, and a resistor-capacitor circuit is added to debouncing. This simplifies the design of the hardware circuit and reduces the size. The display circuit consists of light-emitting diodes and liquid crystals. The liquid crystal uses the MGLS-12864T from Jingdian Company and can display graphics or text. 3. Reliability Design of Intelligent Controller This controller module is located in a strong magnetic field environment. The frequencies of various electromagnetic interference sources are approximately: electromagnetic 20Hz to tens of Hz, switching arc 30 to 200Hz, and magnet 1.0 to 3.6MHz. This module is also located in a high-power electric field power plant, where electromagnetic energy is applied to this controller module through electromagnetic induction. All electromagnetic interference consists of three basic elements: electromagnetic interference source, coupling channel, and sensitive equipment. (1) This design uses surface-mount packaged components such as CS5460 and PCF8563, highly integrated DS80C390, configurable memory device PSD934F2, and solid-state relays with opto-isolation. These controller modules themselves have strong anti-interference capabilities. (2) Power supply is an important way to introduce interference. In order to reduce the interference introduced from it, the following measures are taken: a. Use high-performance switching power supply to resist spike interference, etc.; b. Use varistor or RC network to absorb surge voltage; c. Increase the capacity of electrolytic capacitor and high frequency ceramic capacitor at the power input terminal to filter out low frequency and high frequency interference respectively; d. Use distributed independent functional power supply. e. Ensure appropriate power margin. (3) Optocoupler isolation, solid-state relay switching output and impedance matching of transmission lines are taken on the process channel. (4) When designing the printed circuit board, appropriate board area, double board layer, grid-shaped wiring are adopted to minimize loop area and loop current, insert discrete ground wires between parallel lines, and keep important signal lines close to the ground wire. This controller module uses working ground. Shielded twisted pair is used to reduce electromagnetic interference of current signal loop, and its shielding layer is connected to the circuit breaker shell. The grounding wire is as short as possible and the wire diameter is as thick as possible. (5) High conductivity materials such as copper are used for electric field shielding and magnetic materials are used for magnetic field shielding. Copper electroplated conductive layer is sprayed inside the controller housing. Shielding layer is added to the switching power supply, shielding glass is used in the display window, and electromagnetic sealing gasket is used to prevent magnetic leakage from the housing gap. (6) The anti-interference measures adopted in the software design are: a. Set a watchdog timer. The watchdog timer is slightly longer than the time of one normal cycle of the main program, and a time constant refresh operation is performed once during the operation of the main program. When the program fails, the timer is interrupted due to the inability to refresh the timer normally, and the system is reset. b. Set a software trap. In this design, the non-program area is repeatedly filled with NOP, NOP, LJMP 0000H as an interception measure for program running wild. In this way, no matter which byte the program points to when it is out of control, it can return to the reset state; c. The first-order recursive digital filtering method is used to realize the digital filtering of the software to eliminate the interference signal in the sensor channel; d. Software redundancy, output status image saving, data storage redundancy and initialization and self-test programs are used to deal with the abnormal state of the control. 4. Experimental results (1) Measure the current value. The CPU reads the A/D conversion value in the CS5460 current effective value register, and then obtains the corresponding current effective value through nonlinear compensation and other methods in the software. (2) Measurement of voltage value. A 140Ω resistor is connected in series with the secondary side of the voltage transformer to obtain a voltage of 0 to 150mV. After the voltage is converted by the A/D of the CS5460, it is stored in the voltage effective value register. The CPU can access this register to obtain the conversion result, and obtain the corresponding voltage effective value according to the ratio of the primary and secondary sides. (3) Measurement of power factor. The electrical energy is accumulated through an energy register in the CS5460. According to the relationship between electrical energy and power W=Pt, the electrical energy accumulated in 1s is equal to its active power P. The power factor value is calculated according to the formula cosφ=P/UI. (4) Verification of action response time. This design requires that the circuit breaker reliably trip within 20 ms when a large current occurs in the line. This includes the time required from the occurrence of a large current short-circuit fault to the microprocessor determining the fault and issuing a trip command, mechanical delay time, and arc extinguishing time. This design collects 16 points per signal channel within one power frequency cycle, i.e., one point every 12.5 ms, and then determines whether a fault has occurred based on the set values. Experimental results show that in this system, the time required from the occurrence of a large current short-circuit fault to the microprocessor determining the fault and issuing a trip command is approximately 6 ms. Therefore, the circuit breaker can reliably trip within 20 ms after a large current short circuit occurs.