Abstract: This paper describes the design process of an ARM7 embedded system for use in a track inspection instrument. Centered on the S3C44B0 embedded processor with the ARM7TDMI core, the system's hardware platform is constructed using high-performance peripheral circuits such as CH375 and MAX197. The real-time requirements of data acquisition, data processing, and human-machine interaction are met by utilizing ARM's unique interrupt handling mechanism. This design has been successfully applied to a prototype track inspection instrument.
Keywords: ARM7; S3C44B0; fast interrupt; track detector
1 Introduction
Detecting the static geometric parameters of railway tracks is a routine task for railway departments. Using portable track testing instruments can significantly reduce the workload of inspection personnel. This intelligent measurement technology not only improves the accuracy and reliability of measurements but also provides on-site and subsequent track data analysis, greatly enhancing the quality and efficiency of track inspection work. Portable track testing instruments place many new demands on the functionality and performance of embedded computer systems: high real-time performance, high computing performance, high integration, low power consumption, and low cost. While traditional microcontroller systems can perform general control tasks, their computing power is too low to meet the requirements of on-site data processing. Embedded systems based on ARM series microprocessors designed with the SoC concept can well meet these requirements. ARM cores are known for their high performance and low power consumption, and coupled with a large number of on-chip peripherals provided by IC manufacturers, ARM series processors possess excellent embedded application performance. This design uses Samsung's ARM7TDMI core processor S3C44B0 to perform control and calculation tasks, a 12-bit high-performance AD converter MAX197 to convert sensor signals, and a USB host controller CH375 to transfer data to a USB flash drive. The system also includes other necessary peripherals such as an LCD screen, keyboard, and mini printer.
2 System Design Requirements
2.1 Measurement Principle
The measurement principle of the track inspection instrument is shown in Figure 1. The sensor is fixed by a mechanical support equipped with rollers, and the operator pushes the instrument on the track. The displacement sensor measures the distance d between tracks A and B, the tilt sensor measures the tilt angle θ between the track plane and the horizontal plane, and the photoelectric encoder is connected to a roller to record the current mileage L. The track inspection instrument can be set with a sampling interval ranging from 0.5m to 1m. When the mileage reaches the sampling interval, the current mileage L, track gauge d, superelevation h, and triangular dent t are saved as a record.
During the movement of the mechanical support, vibrations with a frequency much higher than the frequency of track tilt changes are generated. Therefore, the tilt signal needs to be filtered to reduce measurement errors.
2.2 Performance Requirements
The track inspection instrument operates as follows: An AD converter samples the signals from displacement and tilt sensors at a sampling frequency of 33Hz. The first 80 tilt angle samples are then filtered. Every 5cm increase in track mileage, the current gauge and superelevation are saved to a queue. When the mileage reaches the sampling interval, the triangular crater is calculated based on the data in the queue and saved along with the gauge and superelevation as the final data. Therefore, the system requires a timer capable of completing a filtering operation within 30ms. The displacement sensor has a range of 5cm and a conversion ratio of 1V/1cm; the tilt sensor has a range of ±10° and a conversion ratio of 1V/1°. The display resolution for gauge, superelevation, and triangular crater needs to reach 0.1mm. Therefore, the AD converter needs to have 12-bit accuracy. Additionally, the system needs to support USB flash drive storage, on-site printing, a clock, LCD display, and keyboard input.
3 Hardware Design
3.1 Overall Hardware Design
There are many models of ARM7 series processors. The design uses the commonly used Samsung S3C44B0, which contains a powerful ARM7TDMI core and a large number of practical peripherals [1]. According to the actual needs of the application, the S3C44B0 is equipped with a 1M×16Bit Nor Flash SST39VF1601 and a 4Banks×1M×16Bit SDRAM HY57V641620.
The MAX197 is a single-supply, multi-channel, multi-range 1/2LSB precision 12-bit AD converter with a sampling rate of up to 100ksps, which fully meets the requirement of a 33Hz sampling rate. Although it is powered by a single 5V supply, it has four ranges: ±10V, ±5V, 10V and 5V. It also integrates a clock generator and reference circuit, and the data interface can be directly connected to a general-purpose controller. The MAX197 provides fairly high performance with a simple circuit, making it an ideal choice for embedded applications [2].
CH375 is a general-purpose interface chip for USB bus, supporting both master and slave modes. In master mode, it supports common full-speed USB devices. It has built-in firmware for a dedicated communication protocol for handling Mass-Storage devices. External controllers can directly read and write common USB storage devices in sectors[3], providing a practical USB flash drive storage solution for embedded devices.
The system block diagram is shown in Figure 2. The IO pins of the S3C44B0 are driven by 3.3V LVCMOS, and the maximum input voltage is 4.6V[1]. Therefore, when the bus is connected to peripherals with 5V logic level such as MAX197 and LCD screen, a bus transceiver should be added for isolation. In addition, some of the GPIO pins used for input also need to be buffered.
3.2 High-efficiency power management
Power management is a critical component of battery-powered portable devices. Using low-power devices and improving power management efficiency are two important means to extend the continuous operating time of the system. The power supply scheme shown in Figure 3 is designed based on the characteristics of the electrical appliances and cost considerations.
While DC-DC power supplies are highly efficient, their large ripple factor makes them unsuitable for powering analog circuits. Linear regulators, although offering good voltage regulation, are inefficient and can only step down voltage. AD converters operate with very low current and require high power stability, so linear regulators are used directly to power them. The digital sections all use DC-DC power supplies, and linear regulators are also used for the multiple voltages required by the processor, resulting in acceptable power losses. The positive and negative voltages required by sensors are obtained through DC-DC boost and inversion; linear regulators are also used to eliminate the ripple effect. Separate DC-DC converters, controlled by the processor, are used for high-power LCD backlights and printers. However, DC-DC converters are not well-suited for large load fluctuations; the power consumption of the printer head is intermittent with high instantaneous power, therefore the DC-DC converter needs sufficient power margin.
This power supply solution has achieved good results in practice. When the backlight and printer are turned off, the output current of the 12V battery is less than 120mA.
4 Software Design
4.1 Real-time data acquisition
Because data acquisition has high real-time requirements, the software design does not use an operating system, but consists of multiple interrupt service routines and a main program. The design uses a total of 4 external interrupts and 3 internal interrupts, which come from the forward and reverse rotation of the photoelectric encoder, MAX197, CH375, RTC and two timers respectively. Among them, the two more important interrupts come from the photoelectric encoder and the timer that generates the sampling frequency. The former is characterized by a high frequency, up to 1KHz, and cannot be lost. The latter is characterized by a long interrupt service routine running time and the need to complete filtering operations, so the interrupts are required to be nestable. The ARM processor does not directly support the nested execution of interrupt service routines in hardware [4]. Although it can be implemented in software, it will increase the additional running overhead. The above problems can be solved by cleverly using the unique interrupt mechanism of ARM. ARM provides two types of interrupts: FIQ and IRQ. When the FIQ interrupt arrives, the processor will switch the running state to FIQ mode. In this mode, there are dedicated registers to reduce the time loss caused by stack pushing. IRQ is similar, but there are not as many dedicated registers as FIQ. Therefore, when the processor runs the interrupt service routine in IRQ mode, it can respond to the FIQ interrupt immediately. By treating the interrupts generated by the photoelectric encoder as FIQ type and other interrupts as IRQ type, each interrupt can be responded to in a timely manner [5].
The S3C44B0 interrupt controller can set an interrupt as FIQ or IRQ type and send it to the ARM core. The ARM core only has two interrupt signal lines, FIQ and IRQ. Therefore, the processor needs the cooperation of the interrupt controller to determine which interrupt source an interrupt comes from. The S3C44B0 provides two solutions: VECTORED INTERRUPT MODE and NON-VECTORED INTERRUPT MODE. VECTORED INTERRUPT MODE can execute different interrupt handlers for different interrupts, just like CISC processors. Its implementation principle is that when an interrupt arrives, the hardware logic generates a corresponding jump instruction based on the specific interrupt source and places it on the bus. After the ARM core obtains the instruction, it immediately jumps to the corresponding handler [1]. This can improve the interrupt response speed and simplify program design, but this mode only supports IRQ type interrupts; NON-VECTORED INTERRUPT MODE, like other ARM processors, uses the interrupt service routine to access the I_ISPR register of the interrupt controller to determine the interrupt source.
In the design, the photoelectric encoder's interrupt type is set to FIQ and uses the NON-VECTORED method, while other interrupts are set to IRQ and use the VECTORED method. The interrupt vector table consists of two parts: the first part contains the exception jump instructions for the ARM core, and the second part is used by the S3C44B0's VECTORED interrupt mode. Interrupt service routines can be written in assembly or C language. For C language functions of type FIQ and IRQ, the __irq macro needs to be added so that the compiler can generate the correct return instructions.
4.2 Overall Software Design
Since there is no operating system, the startup code and the application are integrated. The startup code is written in assembly language and, in addition to the interrupt vector table mentioned earlier, is also responsible for hardware initialization, copying itself from ROM to SDRAM, initializing the stack in various modes, etc. Only after completing the above tasks can the program jump into the function written in C language.
The tasks outside of data acquisition have very low real-time requirements. Except for keyboard scanning and RTC, which use low-priority interrupts, all other parts are contained within the main program loop. It is particularly important to note that because the interrupt vector table is stored in Flash, all interrupts must be disabled when writing data to Flash. Therefore, data that needs to be saved should first be placed in SDRAM and then written to Flash after each measurement is completed.
The manufacturer of the CH375 USB controller provides library files for reading and writing USB flash drives. By simply defining external functions for reading and writing the CH375 hardware and configuring the interrupt service routine to the corresponding interrupt, operations on the USB flash drive's FAT file system can be achieved.
4.3 Compilation and Debugging
The design uses ARM's ADS1.2 software development environment. Compiling the C program may generate code for Semihost communication, which includes the SWI (Soft Interrupt for Semihost) instruction. However, the design does not include SWI exception handling, and the compiler lacks a compiler option to disable Semihost functionality. Therefore, encountering the SWI instruction will trigger a soft interrupt exception. The solution is to disassemble the machine code, find the corresponding function, and redefine it.
5. Conclusion
The defining characteristic of embedded systems lies in their highly targeted applications. This design fully utilizes the performance and resources of the ARM7 processor, building the entire hardware and software platform according to specific application goals, achieving high performance and low power consumption. This system has been successfully used in a prototype track inspection device and provides valuable reference for the development and design of other ARM processor-based embedded systems.
The innovation of this paper lies in its application of the ARM7 processor in a track detector. Traditional testing instruments often rely on microcontrollers, which are relatively slow and resource-constrained, requiring expansion in many applications, thus hindering power consumption reduction and integration. This innovative combination of ARM7 processor and traditional application represents a significant advancement in information processing technology. The ARM7 embedded platform enhances system performance and integration while transforming traditional system design methods. In particular, the ARM processor's unique interrupt mechanism facilitates more convenient and reliable real-time data acquisition and processing. Furthermore, the high-efficiency power supply system is another highlight of this paper.
References
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[4] Du Chunlei. ARM Architecture and Programming [M]. Beijing: Tsinghua University Press, 2003.
[5] Ji Zhenhua. Analysis of S3C44B0 exception handling based on ARM7TDMI kernel [J]. Microcomputer Information, 2006, (05).