Abstract: This paper introduces an inverter device with a diode-neutral-clamped three-level voltage-source inverter as the main circuit. The principle of the traditional SVPWM algorithm for three-phase three-level inverters is analyzed in detail, and the method for generating SVPWM waveforms is elaborated. Simulation analysis was performed in Matlab/Simulink using a three-level inverter as the object. The simulation results are compared with those of a two-level inverter, confirming the effectiveness of the three-level control method and the correctness of the model, providing a valuable reference for the research of three-level inverters.
With the introduction of high-speed trains, my country's railway industry has entered the high-speed era, and breakthroughs have been made in the research of key technologies for the CRH2 locomotive. The frequency converter on this train is a high-capacity, high-voltage frequency converter. Since the current single-tube capacity and traditional two-level control method cannot meet the application requirements, a three-level controller is adopted. The three-level controller has advantages such as reducing the voltage drop of switching devices, improving the waveform quality of the output waveform, and reducing the impact on the inverter and load. It is used in high-speed train sets.
The so-called three-level inverter consists of four power electronic switching devices connected in series per phase arm. The DC circuit neutral point 0 (its potential is zero) is led out by two clamped diodes and connected to the middle of the upper and lower arms respectively. In this way, the withstand voltage of each power electronic switching device can be reduced by half, so the structure is more suitable for medium-voltage high-power AC drive control, which is also the widely used topology. The main circuit of the three-level neutral point clamped inverter is shown in Figure 1.
Figure 1. Main circuit of a three-level neutral-point clamped inverter
The Park vector of a three-level inverter is
(1)
Typically, inverters utilize the switching on and off of switching devices to output only three voltages per phase: +Udc/2, 0, and -Udc/2. Following general formula (1), the output voltage vector has only 27 types, meaning the inverter outputs 27 basic vectors, as shown in Table 1. Here, vectors with an amplitude of 2Udc/3 are generally defined as large voltage vectors, such as PNN and PPN; vectors with an amplitude of 3Udc/3 are defined as medium voltage vectors, such as PON; and vectors with an amplitude of Udc/3 are defined as small voltage vectors, such as POO and ONN. These three types of vectors can be simply referred to as large vectors, medium vectors, and small vectors, respectively.
Basic vector types | Corresponding three-phase output switch state |
Long vector | pnn ppn npn npp nnp pnp |
Medium vector | Pop opn npo nop onp pno |
short vector | Poo onn ppo oon opo non Opp noo opp noo pop non |
Zero vector | Ppp ooo nnn |
Table 1 Three-Level Vector Table
To achieve SVPWM control of a three-level inverter, the following three steps should be taken within each sampling cycle:
(l) Region determination. Identify the three basic vectors of the composite reference voltage vector.
(2) Time calculation. Determine the duration of action of the three basic vectors, that is, the duty cycle of each vector.
(3) Time state allocation. Determine the switching state and action sequence corresponding to each basic vector, and allocate the action time corresponding to the basic vector to the corresponding switching state to complete the control of the switching device.
1. Region Judgment
Traditional algorithms divide the entire vector space into six large regions based on the three-level basic space vector diagram, and then divide each large region into four smaller regions. Since short vectors in the basic space vector appear frequently in each sampling period, this paper further subdivides each large region into six smaller regions for the sake of algorithm and simulation accuracy.
Following this division method, the region division of the traditional three-level SVPWM algorithm is shown in Figure 2. Large regions are represented by I, II, III, IV, V, and Vl, and small regions are represented by 1, 2, 3, 4, 5, and 6.
Large regions are divided into zones of 60° each based on the vector angle; therefore, the large region can be determined by the angle of the reference voltage vector. Based on the regional distribution and geometric relationships of smaller regions, the smaller region containing the reference voltage vector can be determined using the following method.
(I) The method for judging large sectors is basically the same as that for two-level systems, but a traditional method is used here to judge large sectors. When a three-phase sinusoidal voltage is applied to the motor, a circular magnetic flux is generated in the air gap of the motor. Then we vector synthesize the three sinusoidal currents with a phase difference of 120° according to equation (1), and then transform the amplitude and phase angle. At this time, we obtain a value with a constantly changing phase angle, and then use the ceil (ceil: round to positive infinity) function of the Fun module in Matlab to judge the large sector. The value N of the sector is obtained. Next, we judge the small sector.
(ii) Judgment of small sectors
III. Calculation of Action Time
After determining the region where the reference vector is located, the volt-second equilibrium equations are applied.
Solving for , , and completes the calculation of the basic space vector action time in the traditional three-level SVPWM algorithm.
The basic vector action time within the region is shown in Table 1.
Solving for , , and completes the calculation of the basic space vector action time in the traditional three-level SVPWM algorithm.
The basic vector action time within the region is shown in Table 1.
Table 1 Basic Vector Action Time Table
Based on the table above, the following pattern can be found: the variation pattern of the action time in large sectors one, three, and five is the same; the variation pattern of the action time in large sectors two, four, and six is the same. Therefore, we only need to analyze large sectors one and two. This yields the action times , , and . Thus, the action time of the second small sector within the large sector only needs to be adjusted by changing the output time order, i.e., outputting the action times in the order , , as shown in the diagram above. Similarly, by building the simulation models for other sectors and simply changing the output order according to the pattern, the action times can be constructed. The same method can be used to build the calculation time module for the second large sector. The next step is to select the action time based on the sector position. Using a selection switch, following the principle that the action time n of the small sectors is inside and the action time N of the large sectors is outside, the action time of the entire region is selected.
IV. Time Status Allocation
The purpose of time state allocation is to determine the switching states and their order of action corresponding to each basic vector, allocate the action time of the basic vector to the corresponding switching state, generate the trigger waveform of the main circuit switching device, and complete the control of the switching device. This is a key part of the three-level SVPWM algorithm. Using the negative short vector as the starting vector of each sampling period, a seven-segment time allocation is implemented. The action time of the basic vector in each region is , , and , which are arranged according to the order of the short vector as the starting vector of each sampling period. Therefore, the seven-segment time allocation is the same for all regions; the differences lie in the values of , , and . Thus, each region can use the same seven-segment time allocation simulation module.
The seven-segment simulation module does not map the action time to the switch state. Instead, it generates a trapezoidal wave M containing time information corresponding to the vector state through time superposition, which serves as the selection or allocation signal for the next vector state sequence simulation module. Based on the principle of state action order, each sampling period uses a negative short vector as the starting vector, with 0, 1, and 2 representing vector states n, o, and p. Table 2 shows the order of sectors one and two in the vector state sequence simulation data table.
Table 2. Vector State Sequence Table for Large Sectors 1 and 2
area | Vector State Sequence |
Ⅰ1 | 100 110 111 211 111 110 100 |
Ⅰ2 | 110 111 211 221 211 111 110 |
Ⅰ3 | 100 110 210 211 210 110 100 |
Ⅰ4 | 110 210 211 221 211 210 110 |
Ⅰ5 | 100 210 211 221 210 200 100 |
Ⅰ6 | 110 200 210 211 210 200 100 |
II1 | 110 111 121 221 121 111 110 |
II2 | 010 110 111 121 111 110 010 |
II3 | 110 120 121 221 121 120 110 |
II4 | 010 110 120 121 120 110 010 |
II5 | 110 120 220 221 220 120 110 |
II6 | 010 020 120 121 120 020 010 |
The vector state sequence simulation module has a layered, progressively deeper structure. From the inside out, the first layer is the vector state sequence of individual cells, the second layer is cell selection within a larger area, and the third layer is the vector state sequence of the entire region. The model's key feature is the extensive use of Simulink's multiplexer switches to arrange the vector state sequence, determine the region, and finally perform state transitions.
Summarizing the simulation models above, we can obtain the overall simulation model as follows:
Simulation results
After adding a three-level inverter bridge and a permanent magnet synchronous motor, the measured output line voltage waveform is shown below. The synchronous motor parameters are as follows: Rs=18.7, Ld=0.02682H, Lq=0.02682H, J=2.26e-5Kg.m^2, F=1.349e-5N.ms, p=2, and the load applies a torque T=0.5 at t=0.04s. To compare with the output characteristic curve of a two-level inverter bridge with a permanent magnet synchronous motor, the two-level output characteristic curve is shown below, with the motor parameters remaining unchanged. The simulation waveform is as follows:
1. Difference in line voltage
2. Difference in torque under load
Note: The torque ripple of a three-level circuit is significantly smaller than that of a two-level circuit.
3. THD content
in conclusion:
This paper uses simulation software to compare two-level and three-level circuits, and introduces permanent magnet synchronous motors into each. The simulation results are as follows: 1. The electromagnetic torque of the three-level circuit has less pulsation; 2. The action time is faster; 3. The DC voltage applied to the three-level circuit is half that of the two-level circuit; 4. The output power of the three-level circuit is greater, allowing the motor to reach its rated speed more quickly. Finally, FFT analysis was performed using Powergui. The THD of the three-level circuit is significantly lower than that of the two-level circuit, indicating a reduction in harmonic content.
