Abstract: This paper introduces a data acquisition card for TCR devices, presents the hardware interface circuit of the data acquisition card, and describes the design and implementation of the acquisition software. Practice has proven that this data acquisition card has broad application prospects.
Keywords: TCR; data acquisition; hardware interface circuit; software design;
Abstract： The paper introduces the data acquisition card of TCR, It gives hardware interface circuit of the data acquisition card, The design and implementation of software is also introduced in this paper. The practice proved the card features with a wide application in the future.
Keywords: TCR; data acquisition; hardware interface circuit; software design;
1 Introduction
In recent years, with the continuous increase of high-power nonlinear loads, the reactive power impact and harmonic pollution of the power grid have shown a continuous upward trend. The lack of reactive power regulation means that the bus voltage varies greatly with changes in operating mode, leading to increased line losses and reduced voltage qualification rate. The use of TCR-type static dynamic reactive power compensation devices (SVC) is very effective in eliminating the reactive power impact generated by symmetrical loads such as rolling mills and other large motors, and is widely used in important applications such as metallurgy, mining, and electrified railways.
The data acquisition unit is one of the most crucial components of the entire TCR device. Its task is to quickly and accurately acquire and convert three-phase voltage and current signals from the field, determining whether the TCR device can perform reactive power regulation accurately and rapidly. In previous high-voltage reactive power compensation devices, the data acquisition section typically consisted only of an MCS51 or 96 series microcontroller system, using the microcontroller's built-in A/D converter for data acquisition. This approach not only places a heavy burden on the microcontroller due to its integrated data acquisition, processing, control judgment, and output functions, but also suffers from long calculation times and low accuracy due to the lack of a dedicated floating-point unit and the limitation of 16-bit precision. This cannot meet the needs of complex control algorithms. Furthermore, the numerous peripheral components and the complexity of the control method increase the number of control lines, wasting microcontroller resources and increasing costs.
To address the aforementioned issues, this paper presents a novel data acquisition card that features fast acquisition time, high conversion accuracy, simple control method, minimal hardware circuitry, and safe and reliable operation.
2. Composition and Structure of TCR Data Acquisition Card
The TCR data acquisition card mainly consists of three-phase voltage and current transformers, isolation operational amplifier circuits, A/D conversion circuits, decoding circuits, and DSP circuits, as shown in Figure 1. The TCR device first samples the real-time three-phase voltage and current signals of the system through the three-phase voltage and current transformers. These signals are then isolated by the isolation amplifiers and sent to the A/D converter. Meanwhile, the DSP sends control signals to the decoder to control the A/D converter for analog-to-digital conversion. After the conversion is complete, the result is sent to the DSP. The DSP calculates the active and reactive power of the system based on the current voltage and current data and issues control commands to adjust the reactive power of the system.
Figure 1. Block diagram of TCR data acquisition card
3 TCR Data Acquisition Card Design
3.1 Introduction to Main Chip Circuits
Figure 2 shows the connection diagram of the voltage acquisition and conversion circuit in the data acquisition card (the connection diagram of the current acquisition and conversion circuit is the same). The DSP chip used is the new generation TMS320F2812 chip from TI, which has a 32-bit data bus width, a 24-bit address bus width, and a speed boost to 150M. The chip has built-in 18K×16-bit SRAM, 128K×16-bit FLASH, 4K×16-bit BootROM, and 1K×16-bit OTPROM. It also has a rich set of peripherals, including a 2×8-channel, 12-bit, 80ns conversion time, 0-3V range ADC, a CAN bus transceiver, and 12-channel PWM outputs. The A/D conversion circuit uses the AD7864 manufactured by Analog Devices, a high-speed, high-precision, low-power, four-channel synchronous sampling 12-bit analog-to-digital converter that uses a +5V power supply. The chip internally features a 12-bit successive approximation analog-to-digital converter, four track-and-hold amplifiers, an internal 2.5V reference voltage, an on-chip clock oscillator, and a high-speed parallel interface. The AD7864 has a conversion time of 1.65µs/ch, a sample-and-hold time of 0.35µs, and a maximum single-channel sampling frequency of 500kSPS. The integrated circuit AD780 provides a high-precision reference voltage output, and the decoding circuit uses the 74F138.
3.2 Data Acquisition Card Hardware Design
As shown in Figure 2, the DSP (TMS320F2812) in the data acquisition card first sends the decoded address through address lines A15-A13 and sends it to the decoding circuit (74F138). After decoding, the control signals RD1, RD2, and CONVST of the A/D conversion circuit are output from Y1-Y3 of the 74F138, which control the two AD7864 chips to perform analog-to-digital conversion. At this time, the three-phase voltage and current signals have been input into the two AD7864 chips respectively. As long as the control signal issues the command to start the A/D conversion, the AD7864 will start the analog-to-digital conversion and send the converted data to the D0-D11 data bus of the TMS320F2812. In addition, the input of the AD780 reference voltage circuit of the A/D converter is connected to a 5V voltage, and two filter capacitors C1 and C2 are connected in parallel to ground with capacitance values of 10uF and 0.1uF respectively to filter out interference level signals in the 5V power supply. A 2.5V reference voltage is output through the out pin and connected to the VREF pin (reference level input terminal) of the AD7864. R1, R15, and R16 are pull-up resistors of the AD7864 with a resistance value of 10KΩ. U1-U3 are the three-phase voltage sampling values, which have been input to VIN1-VIN3 of the AD7864. At this time, the soft and hard selection signal H/SSEL of the AD7864 is set low. The selected conversion channel is then determined by the state of the hardware channel signal. Since it is necessary to sample three signals, all three channels SL1-SL3 are selected. The 12-bit data DB0-DB11 of the AD7864 are buffered and connected to the lower 12 bits (D0-D11) of the DSP data bus. The other 4 bits of the DSP are always logic low. Pin Y3 of the decoder 74F138 is connected to the CONVST pin of the AD7864. The CONVST signal is software-controlled to initiate the AD7864's analog-to-digital conversion. When the chip select signal is low, the AD7864 is selected, allowing read and write operations. The combination of pin Y2 of the decoder 74F138 and the AD7864's chip select signal serves as the AD7864's read signal. All converted data is stored in the corresponding latches within the AD7864. When the AD7864 is chip selected and RD is low, the DSP can read data in parallel from the data bus D0-D11 according to the conversion order.
Figure 2. Circuit connection diagram of data acquisition card
3.3 Data Acquisition Card Software Design
In the software design, only sampling of the AC channel is required. The A/D conversion signal after startup is connected to the DSP's external interrupt pin; therefore, data sampling is performed by the interrupt sampling program. The main program first initializes the DSP registers, including configuring the I/O port registers, watchdog timer, and clearing internal and external RAM, initializing the AD7864 conversion channel count, etc., then enables interrupts, enters a loop, and waits for an interrupt. In the interrupt subroutine, the timer interrupt is used to periodically start the A/D conversion and then read the converted data from the data bus. The data is read using the format specified after conversion. Since the AD7864 output data is encoded in two's complement, two buffers are allocated in the data space to store the conversion results. When the buffer is full, the buffer full flag is set; when the data in the buffer has been processed, the buffer full flag is cleared to zero. This prevents data from being overwritten by new data before it has been processed. Furthermore, the DSP data bus has 16 bits, while the AD7864 only has 12 bits, and the values are represented in two's complement. Since the hardware processing sets the high 4 bits of the data sent to the DSP data bus to 0, a sign bit extension is needed to correctly represent negative numbers sent from the AD7864 to the DSP. Specifically, a bitwise AND operation is performed between the data sent from the AD7864 to the DSP and 0x800. If the result is true, the number is negative. Then, a bitwise OR operation is performed between this number and 0xF000, which pads the high 4 bits of the negative number with all 1s. This allows the negative number to be correctly represented in the DSP.
4. Conclusion
This article introduces a data acquisition card used in TCR devices, and describes its hardware circuitry and operation process, as well as its software implementation method. Currently, this data acquisition card is being used in the field, and practical experience has proven that it can correctly acquire and store high-speed data streams from each channel, operates stably, and fully meets the high-speed, high-precision data acquisition requirements of TCR devices.
References:
[1] Wan Shanming. TMS320F281xDSP Principles and Application Examples, Beijing University of Aeronautics and Astronautics Press, 2007.
[2] Gao Hui, Cui Wenjin, et al. Research and Implementation of a New Type of Universal Controller for Power Systems, Automation of Electric Power Systems, 2000(14)
[3] Gao Guangtian. Application Technology of Analog-to-Digital Converters. Beijing: Science Press, 2001.
About the author:
Wang Guoqiang (1979-) Male Engineer/Master of Engineering Research direction: High voltage reactive power compensation device and high voltage frequency converter control system.
Current position: Power Grid Division, Harbin Jiuzhou Electric Co., Ltd.
Mailing address:
No. 162, Haping Road, Nangang District, Harbin City, Heilongjiang Province
Harbin Jiuzhou Electric Co., Ltd. Power Grid Division
Postal code 150081
Telephone: 13936307357
